# The 18650 - 13s10p Project - 48V x 34Ah



## Solarsail (Jul 22, 2017)

*The 18650 - 14s10p Project - 48V x 34Ah*

This is to chronicle a project to construct a 1.6 kWh module from 18650 cells. The configuration is 13s10p (edit: upgraded to 14s10p) using 130 (140) "Grade A" Panasonic NCR18650B (edit: unprotected) li-ion cells. These cells are nominally rated at 3.4 Ah and guaranteed to 3.25 Ah.

The first order of 100 cells (at US$3.28 each - $272/kWh) was received from Shanghai today and I have started testing individual cells, and plan to test all cells. Shipment was by air and arrived in 4 days. Shipment adds another $1 to the price, and with transaction costs amounts to $1.24 a cell. I was told it is not possible to ship via sea, and must be by air.

It has been observed that cells purchased from some suppliers in China have contained some fake mislabeled re-cycled cells or fake low-quality low-capacity Chinese cells. I plan to test for capacity, weight, impedance, and thermal behaviour during charging.

Photo of shipment - each cell has an individual white paper box with a safe handling warning, and a pair of these boxes are inside a green box with the same warning. These boxes were not from the original manufacturer (Panasonic / Sanyo). Each cell had a sticker that covered the manufacturer's label that says NCR18650B without giving the capacity. The sticker says "18650 3400 mAh 3.7V". There are also lot numbers on the cell's wrapping and probably on the steel casing, which may give a clue to the origins of the cell.


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## Solarsail (Jul 22, 2017)

The cells arrive with 3.51V charge or about 25% SoC - a bit low.

The first cell tested provided a whopping 3,462 mAh of capacity (272 Wh/kg, relaxed 4.20V - unrelaxed 2.86V at -0.25A discharge current). This is rather surprising as I have never seen any cell, including new brand name laptop cells, that could exceed its marked capacity, even at discharge rates as low as 0.1A. The manufacturer's own capacity rating is 3350 mAh (typical), 4.20V - 2.50V at -0.65A discharge.

I would now need to test the same cell at 0.5A to get a better idea of its charge capacity.

At 45.8 grams each, the cells are about 2.7 gr lighter than spec, which puts them at 3.67 kg/kWh, probably the lightest storage available.

A second cell results in 3,466 mAh under the same conditions.


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## kennybobby (Aug 10, 2012)

i hope those are real cells and not fakes, that added label is kinda flaky and there appears to be no marking as "Panasonic". It is hard to find info on whether or not these cells are internally protected or not--there are numerous websites advertising them, some say yes others say no...

Panasonic datasheet indicates rated capacity at 3200 mAh, but it varies so much with both temperature and discharge rate that almost any value could be quoted.

i wonder if the datasheet has transposed the digits of the weight, then your measurement matches exactly.


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## Karter2 (Nov 17, 2011)

This independent test is useful.
It reports a 45.9 gm weight for the unprotected version..
http://lygte-info.dk/review/batteries2012/Panasonic NCR18650B 3400mAh (Green) UK.html
..and 48 gms for the protected version ...also a little lonnger .
http://lygte-info.dk/review/batteries2012/Panasonic NCR18650B Protected 3400mAh (Green) UK.html
And if you want to compare other cells....just pick any one .
http://lygte-info.dk/review/batteries2012/Common18650IndividualTest UK.html


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## Solarsail (Jul 22, 2017)

Hi kennyhobby - the cells are unprotected, at least according to the order, and the price reflects that. The labeling is standard for Panasonic. The standard label neither mentions the manufacturer or the capacity. That is why the distributor affixes the capacity sticker.

The 3200 mAh "Rated capacity" on the data sheet is confusing. In another spec, it says "Nominal Capacity (typical) 3350".

The spec weight is 'max 48.5'. I suppose different lots may have some weight variation, or that overtime, they manage to reduce weight.


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## Karter2 (Nov 17, 2011)

Is this the label you have ?..
The capacity sticker is a requirement for export shipping approvals.
http://lygte-info.dk/pic/Batteries2012/Panasonic NCR18650B 3400mAh (Green)/DSC_2683.jpg


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## Solarsail (Jul 22, 2017)

Hi Karter2 - thanks for the links to the 18650 testing site.

Yes, that is exactly the cell I have received. Here is an image.

The label at the bottom of the cell wrapper says "E6 7130".


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## kennybobby (Aug 10, 2012)

Can you carefully measure the overall length (without shorting the ends)?


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## Solarsail (Jul 22, 2017)

kennybobby said:


> Can you carefully measure the overall length (without shorting the ends)?


They all measure 65mm plus a tad over. About 65.2mm.

There are now two batches. E6-7130 and E6-6X21.

I have measured the capacity of about 10 cells (once each). If measured at 0.25A, they are above 3400 mAh with one at over 3500 mAh. If measure at 0.5A, they are above 3350 mAh.


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## Karter2 (Nov 17, 2011)

The "normal" ( most commonly used) discharge rate for capacity testing, is 0.2C. Hence why the spec sheet states 0..65amps.for those cells.


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## Solarsail (Jul 22, 2017)

Karter2, do you know why China or the shipping companies require cells to be labelled for capacity, when they know a lot of cells exported are fakes and have unbelievably wrong capacities? Is there a promotion subsidy for high capacity exports?


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## Solarsail (Jul 22, 2017)

A quarter of the cells have been tested, and all have passed. The variation between cells is slight and the physical appearances are identical.

I am using 3 different discharge testers and at varying discharge currents. So it has been difficult to arrive at a testing standard. After some compensation I get the following at 0.25A discharge:

Minimum capacity 3,300 mAh
Maximum capacity 3,500 mAh
Average capacity 3,444 mAh

Testing is from 4.17V relaxed to 2.8V unrelaxed.

At 0.5A discharge, I get about 4% less capacity: 3,310 mAh on average.

In order to verify these cells, I don't think it is necessary to capacity test more than 50% of the cells.


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## Solarsail (Jul 22, 2017)

How does one test for cell DC impedance?

When the cell discharges, the voltage drops within 5 seconds (unrelaxed state), and then when the current is cut, the voltage returns back to almost its original level (relaxed state).

So I believe in addition to drop due to impedance, the electrochemical process also results in drop of voltage.

How does one separate the two? Just measuring the drop in voltage on a 1A discharge will be the combination of the two effects, and not just due to the DC impedance.

Any ideas how to measure just that?


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## Karter2 (Nov 17, 2011)

The classic method for "DC Internal resistance" ! (DCIR), is just as you discribed.
Discharge at a known current (1C, or 2C, 5C, etc)...measure the steady state voltage under load, then remove the load and measure the relaxed voltage .
Accurate measurements needed,..then Ohms law.
Note DCIR varies significantly with temperature, and state of charge , so be careful to standardise test conditions if you want to compare cells.
You may find this useful...
https://endless-sphere.com/forums/viewtopic.php?f=14&t=73701&hilit=Dcir+testing
Another test recommended is the "charge retention" test..
Charge all cells to a common voltage, say 4.17 (easy if you group cells between two contact plates and charge in parallel)
Then remove the charge contacts and allow the cells to stand for several days before checking individual voltages to see if any self discharge or any voltage variation.
You only need one bad cell to mess up a pack.
You should also match cell capacity as close as possible within parallel groups.


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## dcb (Dec 5, 2009)

Karter2 said:


> You should also match cell capacity as close as possible within parallel groups.


Just curious, given a limited number of cells, why not distribute the cell capacities so each level has about the same capacity (within reason)?


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## Karter2 (Nov 17, 2011)

dcb said:


> Just curious, given a limited number of cells, why not distribute the cell capacities so each level has about the same capacity (within reason)?


Cells in a parallel group cannot be individually monitored for voltage or SOC, or protected against over discharge, so need to be well matched.
Whereas, strings of Parallel groups of different capacity can be monitored and protected by a good BMS.
One reason why its a good idea to assemble a pack with strings of parallel groups.


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## PStechPaul (May 1, 2012)

Perhaps a good way to measure internal resistance would be to measure the voltage difference for current of 0.5C and 1C. That would eliminate the effect of the unloaded (relaxed) condition.


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## major (Apr 4, 2008)

Kar2,

I never use a open circuit cell or battery voltage in the DC resistance measurement and calculation. I always use two different load points. Like 1C and 5C, or 0.5C and 1C. The zero current voltage can introduce errors.

And cells most likely are labelled with Ah due to shipping and transport regulations.

major


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## Karter2 (Nov 17, 2011)

Yes, agree guys, for the optimum result its "Delta V"..
And it should be a "4 wire" method also
...but i have never noticed a significant difference for normal applications.


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## Solarsail (Jul 22, 2017)

Thanks to all for the suggestions.

Hmmm ... as dcb says, I am not sure if it is a good idea to put all weak cells in the same group. For simplicity, assume discharge not more than 1C, and the configuration is 10s5p. Assume 45 of the cells are 3000 mAh to cutoff and 5 of the cells are 2500 mAh to cutoff (the weak cells).

If the 5 weaks are grouped together, then cutoff for the group happens at 2500 mAh per cell (i.e. when 5*2.5A has been drained from the weak group). This means the other 9 groups each has 5 * 0.5 = 2.5Ah of unused capacity. So total dead capacity = 2.5 * 9/10 = 2.25Ah.

On the other hand, distribute the 5 weak cells, one per group. So cutoff will happen at (4*3000+2500)/5 = 2900 mAh. There will be 5 groups each with 100 mAh of dead capacity per cell. So total dead capacity = 5 * 0.1 * 5/10 = 0.25Ah. Which is much less.

When a weak cell is grouped in parallel with four strong cells, I don't think it is the case that cutoff will happen at 5 * 2500 mAh. Rather, cutoff will happen at 4*3000 + 2500. Being in parallel, the stronger cells will supply more current proportionally while the weaker supplies less, and thus the weaker cell cannot get over-discharged. Their voltage will always remain equal. If the current is cut, and the five cells separated, the five in parallel will have same voltage. One weak cell cannot disproportionally reduce the voltage when in parallel. In series, it will disproportionally reduce the voltage, due to the "first past the post" cutoff.


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## dcb (Dec 5, 2009)

fwiw, I did find this:
http://www.sciencedirect.com/science/article/pii/S0378775316300015

which implies for lack of cell current monitoring, it is better to match levels by capacity and impedance for longevity, in simulation. The more cells in parallel and the less you push them to their current and capacity limits, the less critical.

And they state that the capacity changes and impedance changes aren't uniform even if they all start out the same.

soo, you pays your money, you takes your chances 



> 6. Conclusions and future work
> The primary results from the experimental and simulation work presented highlights that cells with different impedances and capacities connected in parallel do not behave in a uniform manner and can experience significantly different currents. The distribution of cell current is shown to be a complex function of impedance, including the high frequency aspects typically ignored for single cell models, and the difference in SOC between cells. As a conventional BMS design does not monitor current within parallel units, some cells may be taken above their intended operating current, or be aged more quickly due to increased charge throughput and ohmic heat generation – shortening the lifespan of the overall battery pack.


but... (SOH=State of Health)


> This implies that they should age slower than the other cells, and so it is expected that gradually the SOHs of the cells within the parallel unit will converge.


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## Solarsail (Jul 22, 2017)

Here are the cells in the 13 x 10 spacer, gradually getting filled up, as they are tested. I will need to order some more cells in order to fill this one up. (eBay search "18650 spacer"). They come in sizes 3x5, 4x5, 4x6, 1x3, 1x2, 1x1, and snap together. I wish they made them larger as a multiple of popular configs.

To connect the cells, nickle strips of 8mm wide are strung and attached with a spot welder to the negative terminal. (eBay search "battery nickel strip")

I am thinking of building a spot welder per the design of Ian Hooper at ZEVA.com.au. What a great guy. But I wonder if I could rent one for this job?

What about the individual cell fuse wire for the positive terminal? Are those welded or soldered? What AWG? I am designing for peak 30 seconds 1.5C or 5A per cell. I think 10A for the fuse is the right size?

What about those 1mm flat tabbing wire used in soldering solar cells. Has anyone used these? I will test them, and I will guess they blow at 10A or a bit under?

http://www.ebay.com/itm/10-ft-Flat-...d=182350096443&_trksid=p2047675.c100005.m1851


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## kennybobby (Aug 10, 2012)

Solarsail said:


> ...
> 
> Being in parallel, the stronger cells will supply more current proportionally while the weaker supplies less, and thus the weaker cell cannot get over-discharged. Their voltage will always remain equal. If the current is cut, and the five cells separated, the five in parallel will have same voltage. One weak cell cannot disproportionally reduce the voltage when in parallel.


But your BMS is not monitoring current, so how will you know when the weak cell has been depleted? How will you not over-charge the weak cell? Do you have test data or experience that indicates your statements hold true?



karter said:


> "Cells in a parallel group cannot be individually monitored for voltage or SOC, or protected against over discharge, so need to be well matched."


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## Solarsail (Jul 22, 2017)

kennybobby said:


> But your BMS is not monitoring current, so how will you know when the weak cell has been depleted? How will you not over-charge the weak cell? Do you have test data or experience that indicates your statements hold true?


The weak cell is in parallel with a large number of strong cells. How can it get depleted without also depleting the strong cells? 

When current is drained from a group of weak and strong cells, it is not supplied equally from the cells. The strong cells supply more than the weak, hence the voltage of the weak cell does not drop faster, because it is being replenished by the strong cells. If the weak cell's voltage is not dropping, how can it be depleted?

Weak cell cannot be overcharged because it will raise the voltage of the group and the strong cells will absorb the current, and not the weak cell. All cells will have same voltage. So how can the weak cell be overcharged? Also known as Kirchhoff's Law.

Are you saying that if I have a 1000 mAh cell in parallel with a 3,000 mAh cell and I charge the group with 2,500 mAh, that the weak cell will be overcharged because it gets 1,250 mAh? Impossible. But I don't think you are saying this. Please provide example with numbers to clarify this matter.


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## dcb (Dec 5, 2009)

the thing not being discussed is that internal resistance is more important than capacity when it comes to determining how the current will be shared among cells, and the two are not directly related. They both are subject to change over the life of the cell, in less than predictable fashion too. But it seems to affect the lifespan of the healthier cells, if the pack is pushed hard and there are few in parallel, and if the pack is pushed beyond 80/20, regularly.


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## Solarsail (Jul 22, 2017)

And internal resistance can be unrelated to cell capacity. So if cells of same capacity are put in parallel, under dynamic condition with a load, they can go out of whack if their internal resistances are very different.

However note that at steady state, when drain is 0A, the parallel cells will quickly balance out, no matter the disparity in internal resistance.

As long as all cells have the same full capacity voltage of 4.2 and empty capacity voltage of 3.0, then parallel cells will balance out at steady state if the internal resistance are different. And no cell, weak or strong, can get over-discharged or over-charged. Of course at 10C, it is a different matter, and internal resistances, thermal behaviour, electrochemical differences, and connection and junction resistance come into play.


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## Solarsail (Jul 22, 2017)

PStechPaul said:


> Perhaps a good way to measure internal resistance would be to measure the voltage difference for current of 0.5C and 1C. That would eliminate the effect of the unloaded (relaxed) condition.


Karter2, major - I am not so sure that delta measurement will remove the electrochemical relaxation effect. But agree that is the better way to measure.

Assume a 3,500 mAh cell at 4.0V relaxed. I drain 1A and within a few seconds it drops to 3.8V. The fact that this drop is not immediate shows that there is another process in play, besides the internal resistance. Call it the ECRE effect (electrochemical relaxation effect).

So now I drain another 0.2A for a total of 1.2A, and I get a ΔV. Why would ΔV be composed purely of DCIR and no ECRE? If both DCIR and ECRE were in effect from 0A to 1A, why would ECRE cease to be in effect from 1A to 1.2A, when 1A was arbitrarily chosen?

When the manufacturer does a 1 kHz AC test, I believe the ECRE is cancelled out. But not in a DC test. I would think I need a 1 kHz high power (1A) signal generator with 3.6V bias.

Or is there an easier method?

As it seems ECRE takes a little while to impact the ΔV, I will try to take the measurement immediately. But I don't have a waveform analyzer with storage.

On the other hand, one can argue that for practical purposes, "apparent DCIR" = DCIR + ECRE. And for fake/real testing, it is just fine to measure the apparent DCIR and not the theoretical DCIR?

However when calculating thermal generation, I suppose one needs the theoretical rather than apparent DCIR?


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## dcb (Dec 5, 2009)

fwiw, grouping all the high resistance cells together creates other problems, i.e. heat concentration.

I think "reasonable" safety factors on state of charge/discharge and max current are in order, depending how much variance you see in your cells, regardless if you make each level the same capacity/resistance or make each cell within a level the same capacity/resistance.

My gut is that if they are all within %10 that distributed is better. And charge to %80 and discharge to %20 and limit to 3c. But that is a swag, and your use case may differ.

plus a sensitive bms should tell you when something has changed at a level.


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## dcb (Dec 5, 2009)

dcb said:


> My gut is that if they are all within %10 that distributed is better.


but then again, in this simple example the lowest resistance "cell" sees 37 amps and the highest resistance sees 30.3 amps. Even though the distributed pack has slightly less resistance (9.933 ohms instead of 10), just being +-10% resistance can mean a large swing in the current demands per "cell" (~%20, no surprise there)

Group by resistance at least, a quick test.


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## Karter2 (Nov 17, 2011)

Solarsail said:


> What about the individual cell fuse wire for the positive terminal? Are those welded or soldered? What AWG? I am designing for peak 30 seconds 1.5C or 5A per cell. I think 10A for the fuse is the right size?
> l]


 Tesla use an Ultrasonic welder i believe for their ((aluminium) fuse wires.
There has been much debate as to what rating fuse wire to use, but i believe The Tesla wires blow between 15-20 amps.
Remember, for them, its main function is to protect the cells/pack from a full internal cell short.

Spot welder...this may be of interest..
https://endless-sphere.com/forums/viewtopic.php?f=14&t=89076
https://youtu.be/fCa2QP1jjBE


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## Solarsail (Jul 22, 2017)

It looks like the source of the current is the LiPoly.

I was thinking of using A123 nano-LFP 26650 cells, as I have a whole bunch of them, and Hooper's circuit. So replacing the capacitors with the LFPs. Each cell can deliver 120A pulse.


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## Karter2 (Nov 17, 2011)

Not worth making anything when a proven unit like that costs under $100.
.


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## Solarsail (Jul 22, 2017)

Karter2 said:


> Not worth making anything when a proven unit like that costs under $100.
> .


Point taken.

I looked up eBay and the cheapest I could find for a spot welder was $200. 

If the one in the video is $100, I will check it out. It looked a bit underpowered, and I don't think LiPoly can deliver 700As like Hooper's does.


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## Karter2 (Nov 17, 2011)

Its not necessarily the current needed as much as the control, pulse time etc.
Read the full thread, ....and this one also if you are serious about welding those tabs..
https://endless-sphere.com/forums/viewtopic.php?f=14&t=68005


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## Solarsail (Jul 22, 2017)

Do I have any other option but welding - I may build 8 modules?

BTW, The power supply will be a plug-in and used for more than one module. But should the charger be installed inside the module enclosure? This way the connection is better, and less floating things to carry. But it increases the module size by about 3 cm in length.


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## Karter2 (Nov 17, 2011)

There are many ways to assemble and connect 18650s into packs, ranging from mutliple spring clip cell holders, soldering, welding, various "dry contact" assemblies, even using those tiny neo magnets to clamp wires on ( yes, it works !). There are also various commercial pack assembly kits, and contract build services....the choice depends on many variables, not least of which are budget and available skills.
This "no weld" system is well respected for its integrity..
https://endless-sphere.com/forums/viewtopic.php?f=14&t=57810
However, the majority of DIY pack builds are generally spot welded or some still risk soldering.


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## PStechPaul (May 1, 2012)

You could also consider silver-bearing conductive epoxy or other adhesive, but it's rather expensive:

https://www.mcmaster.com/#7661a11/=19nmwiq ($33 for 0.09 oz)

https://www.mcmaster.com/#7595a31/=19nmxr3 ($122 for 0.5 oz)

https://www.mcmaster.com/#7365a44/=19nmz0b ($49 for 0.2 oz pen)

https://www.amazon.com/Adhesive-Ele...psc=1&smid=A1665ONA14XMDL#feature-bullets-btf ($14 for 2.5 gram 0.09 oz syringe)

There are less expensive alternatives with nickel, carbon, or perhaps copper, but look at the volume resistivity. It may not require very much if the conductor and the cell are smooth and flat. You could fasten the connecting strip with a tiny drop of conductive adhesive and then reinforce it with a larger glob of plain epoxy over the assembly.


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## Solarsail (Jul 22, 2017)

50 of 100 cells have been tested. They all pass with flying colors. Some of the cells that were charged and discharged with the same testers register within +/- 1 millivolt of one another. All physical appearances are identical and same as genuine Panasonic NCR18650B.

Test is from 4.18 settled to 2.8 unsettled at 0.5A

Minimum 3,300 mAh
Maximum 3,500 mAh
Average 3,440 mAh

If more than 3 or 4 fake cells were included in the batch, one or more would have been detected. There is no reason why the distributor would want to throw in a few fake cells. If the remaining cells include fakes, they will show up in weak groups as the pack is discharged.

I will also be doing a nail test and an impact test with video!

I think I have found a method to measure the internal resistance. I will test DCIR with different base currents, and different SoC levels, and see what we get, and how it compares to the ΔV/ΔI formula.


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## Karter2 (Nov 17, 2011)

If you are using a data logging type charger/discharger, you can simply compare discharge curves at different loads and even directly plot DCIR against dod/capacity.
Are you logging data for future comparason ?


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## Solarsail (Jul 22, 2017)

I wish I had a data logger. Can you refer me to a nice one suitable for this task? 

What future comparison? You mean as the cell ages? It could be for that too. But at the moment my interest is to detect fakes.

One problem is that when current is increased or decreased, it takes a while for the voltage to adjust to the new condition. So the impedence will depend on when the measurement is taken. 

To see how wrong the formula (V0 - V1)/(I1 - I0) is, note that V0, I0, and I1 are constants. But as the cell is discharging, V1 decreases in voltage and is time dependent. But the DCIR does not linearly decrease with cell voltage, it is pretty constant. So the formula cannot be right.


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## Karter2 (Nov 17, 2011)

Many RC chargers have logging.
Such as this..
https://hobbyking.com/en_us/0620-20a-300w-balance-charger-version-2.html
Or you could just use a logging MMeter ( expensive) .
PC logging and graphing software can be downlooaded for free.


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## dcb (Dec 5, 2009)

conceptually, if it is an issue, you can modify what major said, and do a voltage measurement at current A, then a voltage measurement at current B, then another voltage measurement at current A and use the average A voltage. And they should be fairly brief measurements anyway.


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## PStechPaul (May 1, 2012)

You can make a datalogger using a PIC or Arduino. 

http://embedded-lab.com/blog/beginners-data-logger-project-using-pic12f683-microcontroller/

http://embedded-lab.com/blog/low-cost-temperature-data-logger-using-pic-and-processing/

https://www.arduino.cc/en/Tutorial/Datalogger

https://www.adafruit.com/product/1141

Or a multimeter with datalogging function:

http://www.ebay.com/itm/US-Ship-Mul...r-Ohm-USB-PC-Upload-Data-Logger-/401090714400

Or a data acquisition module:

http://www.ebay.com/itm/Measurement...-Data-Acquisition-Multifunction-/272864779211










https://www.microdaq.com/measurement-computing-usb-minilab-daq.php


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## Karter2 (Nov 17, 2011)

If you just compare two discharge curves at known loads (0.5A and 5.0 A shown) you can easily see the delta V at any point in the capacity rating.
Knowing the delta I is constant at 4.5A , thn the DCIR is directly proportional to the delta V.
And in the case of the Pana 18650B shown , it "looks" to vary between 0.3v (67mohm) at 1ah, and 0.4v (88mohm)at 3ah toward the end of the discharge.
This is just a "quick and dirty". Visual calculation, but with a logging charger you could plot DCIR completely over the discharge cycle if necessary.


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## Solarsail (Jul 22, 2017)

Thank you PStechPaul, Karter2, dcb. I will look into the Arduino data acquisition. Plan to build the 100 kWh BMS using an Arduino someday. Thank you for the valuable information.

(Trivia: Did you know that on the Stalinesque forum Stack Exchange - Electrical Engineering, you are not allowed to say "thank you" in the comment? Avoid that place like wildfire.)


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## Karter2 (Nov 17, 2011)

Here is another "no weld" 18650 pack assembly kit.
The Vruzend kit..
$19 for a kit to assemble 50 cells (0.5 - 0.6 kW? Depending on which cellls)
https://endless-sphere.com/forums/viewtopic.php?f=31&t=87434




 
And the Celllog 8 channel data logger for $35...test 8 cells at once.
http://www.ebay.com.au/itm/CellLog-8S-/301992460197?hash=item4650273fa5:g:aI0AAOSwmtJXabob


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## Solarsail (Jul 22, 2017)

What devices and functions would you recommend for this project?

Pack is 48V, 34Ah, 1.6 kWh, rated at continuous 1.5C (50A), Peak 2.2C (75A), charge 0.5C (16.7A).

The 13s10p pack will need the following at the minimum. A 800W charger, a balancer-protection, fuse, i/o plugs, ammeter, voltmeter, 4x thermistors.

Anything else?
Should the charger be installed internal to the enclosure? (power supply will be external)
What size fuse? 100A?
What kind of output plug? What kind of input plug?
Shall the voltmeter also measure individual cell groups voltage? If so, it needs to switch between 13 groups. What is the best way to do this? Use analog CMOS switch?
Charge timer?
On/Off switch or contactor?


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## Karter2 (Nov 17, 2011)

Solarsail said:


> What devices and functions would you recommend for this project?
> ?


......unless i have missed it, i dont think you have actually said what the intended use is for this pack .
Mobile, ?..Car , bike, boat, aircraft, ?
Stationary, ? ..Solar store, emergency back up, etc ?
Intended use is helpful to know , especially for things like housing , cooling etc.


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## Solarsail (Jul 22, 2017)

Good question. This is a generic block that can be used in a variety of applications. Plan is to build 8 of these to augment a Leaf.

Another idea is to build larger packs that would be used in a catamaran with electric drive. About 100 kWh. For this purpose, I think each module will house 2p13s20p or 13s40p (6.4 kWh).

Ultra light aircraft is another possibility. The light weight of the pack is very important here.


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## Solarsail (Jul 22, 2017)

*Re: The 18650 - 14s10p Project - 48V x 34Ah*

1) There has been a design change. The module configuration has been bumped up to 14s10p (from 13s10p). It turns out that 14s balancers-protectors are easy to find. There is a major advantage to this. To arrive at 96s x 4.2V = 403.2V, one can string 7 x 14s = 98s cells, if cells are charged no more than 403.2/(7x14) = 4.12V. This will be a loss of about 2% in capacity, but an increase in charge cycle, which is acceptable. So the pack configuration improves from an unwieldy (7s13s+5s)10p @4.20V to a more design efficient 7s14s10p @4.12V. Another advantage is that a 24V center tap at 7s10p becomes available. I am checking with Torqeedo to see if their Cruise 10FP 10kW 48V Pod Drive controller will accept 14s x 4.2V = 58.8V.

In other words:
12s allows for 96s but not 48V operation
13s allows for 48V but not 96s operation
14s allows for both 48V and 96s operation

2) Does anyone have or know where to find the schematics for a cheap non-ASIC balancer-protection board? I don't have any particular board in mind, but the following link gives an example. It could be any board of such a class of BMS. It does not have to be this board, and I am not using this board. And yes I know that the schematics will be very different from one board to another board. Note that this is not an "intelligent" BMS and I don't believe it contains ASICs. Is there such a thing as a "database of schematics" on the net?

https://www.ebay.com/itm/7S-24V-20A...695597?hash=item213016682d:g:nEMAAOSw-PZZ5Ad-


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## rev0 (Oct 7, 2017)

Solarsail said:


> 2) Does anyone have or know where to find the schematics for a cheap non-ASIC balancer-protection board? I don't have any particular board in mind, but the following link gives an example. It could be any board of such a class of BMS. It does not have to be this board, and I am not using this board. And yes I know that the schematics will be very different from one board to another board. Note that this is not an "intelligent" BMS and I don't believe it contains ASICs. Is there such a thing as a "database of schematics" on the net?
> 
> https://www.ebay.com/itm/7S-24V-20A...695597?hash=item213016682d:g:nEMAAOSw-PZZ5Ad-


There's some videos from this guy on YouTube that explains how these protection boards work, though these ones don't have the balancing function populated: https://youtu.be/Tw-fnea3-gw

I tried designing my own protection board (originally started as a full smart BMS board with balancing) but it was too expensive compared to buying a Leaf BMS and using WolfTronix's custom microcontroller with it (once it's available for sale anyways).


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## Solarsail (Jul 22, 2017)

rev0 said:


> I tried designing my own protection board (originally started as a full smart BMS board with balancing) but it was too expensive compared to buying a Leaf BMS and using WolfTronix's custom microcontroller with it (once it's available for sale anyways).


Fair enough. But now you have to live forever with the quirks of the board, and god forbid if you lose an ASIC or something goes wrong.

Does each Leaf BMS ASIC contain an optocoupler? Is that a must? Why couldn't you not use an ATMega and a voltage divider let's say, to sense the digital signal from the cell directly above (higher in voltage)? One need not duplicate the sophistication of a Leaf BMS - which is designed for commercial operation and one in 100 million fault tolerance? Maybe a board containing 8 ATMega and associated resistors, capacitors, mosfets and zeners. 12x that is still cheap. That should cost very little. These are just random musings, but building from scratch is often faster and easier and certainly more productive and more fun than trying to shoe-horn some existing system with a steep learning curve, resulting in something that is hard to port to other environments or configurations.

I just don't understand when you say it is too costly.


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## rev0 (Oct 7, 2017)

Solarsail said:


> Fair enough. But now you have to live forever with the quirks of the board, and god forbid if you lose an ASIC or something goes wrong.
> 
> Does each Leaf BMS ASIC contain an optocoupler? Is that a must? Why couldn't you not use an ATMega and a voltage divider let's say, to sense the digital signal from the cell directly above (higher in voltage)? One need not duplicate the sophistication of a Leaf BMS - which is designed for commercial operation and one in 100 million fault tolerance? Maybe a board containing 8 ATMega and associated resistors, capacitors, mosfets and zeners. 12x that is still cheap. That should cost very little. These are just random musings, but building from scratch is often faster and easier and certainly more productive and more fun than trying to shoe-horn some existing system with a steep learning curve, resulting in something that is hard to port to other environments or configurations.
> 
> I just don't understand when you say it is too costly.


I haven't dived into the Leaf BMS communication between ASICs, but it seems to use something like an open drain sort of bus with a zener diode and voltage dividers to couple the signal between them. There's a detailed schematic of it here: http://www.mynissanleaf.com/viewtopic.php?f=8&t=17470 

So I have purchased 2 Leaf BMSes, at $70 and $78, and the price of one 8s smart balancer/monitor module for my design was $15.34 in parts only, not including the PCB, plus assembly time/effort, and I'd need 12 of those for a 96s setup ($184 extended price).


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## Solarsail (Jul 22, 2017)

rev0 said:


> So I have purchased 2 Leaf BMSes, at $70 and $78, and the price of one 8s smart balancer/monitor module for my design was $15.34 in parts only, not including the PCB, plus assembly time/effort, and I'd need 12 of those for a 96s setup ($184 extended price).


So it really boils down to time and effort, as neither is a cost issue, and I am not sure which option is higher in labour. The advantage of your design is that it will be portable and extensible, and does not need to interface with a recalcitrant controller. It could for example be used on a 14s or 27s 18650. There is going to be a whole world coming into existence between 48V and 346V. Namely 27s, 40s, 54s, and 80s. It would be great to have an extensible design, which could be programmed to do things that the Leaf could not do.

I may have asked this before, and my apologies if I have, and I am a bit too tied up to do a search at this moment, but is there any chance having your design? I will be happy to take it to production and share the results and software with you.


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## rev0 (Oct 7, 2017)

Solarsail said:


> rev0 said:
> 
> 
> > So I have purchased 2 Leaf BMSes, at $70 and $78, and the price of one 8s smart balancer/monitor module for my design was $15.34 in parts only, not including the PCB, plus assembly time/effort, and I'd need 12 of those for a 96s setup ($184 extended price).
> ...


I'll be happy to share what I have which at this point is just a parts list in a spreadsheet and a partially finished schematic and layout in Eagle.


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## rev0 (Oct 7, 2017)

Actually I did come across a good BMS chip in my investigation, it might cost a little more and draw a little more current but it already does all the critical functions (balancing, cell voltage monitoring, pack current monitoring/cutoff, coulomb counting): https://www.digikey.com/product-detail/en/texas-instruments/BQ7693003DBTR/296-39961-1-ND/5177838

Would just need to pair it with a low power optoisolator (also expensive, but there's not really any good alternatives) and have a microcontroller to talk to the various packs: https://www.digikey.com/product-detail/en/analog-devices-inc/ADUM1442ARQZ/ADUM1442ARQZ-ND/4461940 

There is already a design out there using this chip: https://github.com/LibreSolar/BMS48V and I think I saw another earlier. I don't think this one has an optoisolator for stacking, but you could build an interposer to handle the isolation or handle it at the main controller.


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## Solarsail (Jul 22, 2017)

Thank you rev0 - I will study these ideas. This will be my next project, probably in 6 mos. time for the larger pack (> 12 kWh).


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## Duncan (Dec 8, 2008)

Hi
If you are going to make your own BMS be aware that BMS problems have killed more batteries than they have saved


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## Solarsail (Jul 22, 2017)

rev0 said:


> There is already a design out there using this chip: https://github.com/LibreSolar/BMS48V and I think I saw another earlier. I don't think this one has an optoisolator for stacking, but you could build an interposer to handle the isolation or handle it at the main controller.


Interesting. Am I correct to assume that you only need one optoisolator per BMS board (of 8 or 15 cells) as opposed to one optoisolater per cell?

Interposer?

Why not pass down the signal from the bottom of one board to the top of the next board down by a simple voltage divider? Why have to use an optoisolator for "stacking" (not sure what that is) boards? And then the controller gets it off the bottom of the lowest board - no optoisolators needed? So the top ATmega creates a packet, sends it to the next one down which fills up its slot, and then passes down the packet, and so forth, until the packet is completed at the very bottom and passed to the controller? Only if the controller needs to communicate back to the top ATmega would one optoisolator be needed? Does it even have to communicate back?


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## rev0 (Oct 7, 2017)

Here is the other project I saw, just a basic board for the TI chip: https://github.com/nseidle/BMS

Interposer means a small board to go between two others, in this case which would have an optoisolator to keep the BMS board isolated from the main controller.

You can do the voltage divider method also, if you have your own microcontroller to store/forward the packets like you mentioned.

I wanted to do bidirectional communication in my system so I could manually enable/disable the balancing or trigger ADC reading only when the system was on (with the ADC active the current draw is significantly higher, maybe on the order of a couple mA, so you wouldn't want it on all the time when the car is parked).


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## Solarsail (Jul 22, 2017)

Sorry for my ignorance, but I could not find the schematic for the github/nseidle/BMS. There were the .sch files, but I cannot open them. What do I need?

Assume there is one ATmega MC per cell. The controller can tell the top (highest voltage) MC via an optoisolator to disable balancing or go standby. The MC would then send a message to the next MC to do same, and then go on standby. This will trickle down. Only one optoisolator needed.

If the controller needs to send a message to a particular MC, it will send it to the top MC which will eventually reach that particular MC.

If an MC detects an abnormal condition, it could send a message down the ladder which eventually gets to the controller. And the controller could periodically send a ping message to circulate and make sure all MCs are healthy.

What is it that a BQ7694 can do that 8 or 15 MC cannot do with proper distributed firmware?


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## rev0 (Oct 7, 2017)

Solarsail said:


> Sorry for my ignorance, but I could not find the schematic for the github/nseidle/BMS. There were the .sch files, but I cannot open them. What do I need?
> 
> Assume there is one ATmega MC per cell. The controller can tell the top (highest voltage) MC via an optoisolator to disable balancing or go standby. The MC would then send a message to the next MC to do same, and then go on standby. This will trickle down. Only one optoisolator needed.
> 
> ...


Looks like an Eagle project, you can download it from Autodesk, there's a free version.

Sure, if you're up to the task then a microcontroller will do just fine, though you may still want to pair it with a good ADC, I was going to use a MAX11629 8-ch 12 bit ADC. I don't think the 10-bit one built in has enough resolution, especially when dealing with voltage dividers, but that's up to you. Here's some data taken with such a setup and that ADC: http://www.diypowerwalls.com/t-Pack-Cycle-Testing


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## PStechPaul (May 1, 2012)

I've looked into various design ideas for a BMS and cell balancer. I think this could be accomplished with a microcontroller for each set of 8 cells, and an 8 channel DG408 analog multiplexer to read the string voltages at 8 points into an 8:1 voltage divider. The DG408 can handle up to 44 volts so eight cells at 4.2 volts each would be 33.6 volts. The DG408 draws only 10 uA. A 100k voltage divider draws at most 420 uA while reading but that can be done in less than 1 mSec perhaps once every few seconds, so average current is only a few microamps. 

Each set of 8 cells can perform balancing by putting loads on high cells, using transistors for level-shifting. Each 8-cell module can communicate with a central processor directly, or in daisy-chain fashion with other modules, using opto-isolators or digital isolators. The microcontroller can sleep when not sampling cell voltages or communicating. Twelve modules of 8 cells each would work for 403 volts with 4.2V Li-Ion cells.


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## Solarsail (Jul 22, 2017)

The DG408 idea is interesting PStechPaul. Would a digital isolator be different from an optoisolator?

With 10 bit resolution, that would be 0.005V, assuming the range is 0 to 5V? My feeling is that this may be sufficient resolution. If so, then all optoisolators could be eliminated except for one, when we use one MC per cell. I think an ATmega can be as cheap as $2.00. And there would be no need for precision voltage division. My gut reaction is that this is superior to using a specialized BQ7693 chip. But a nuanced analysis would be required to decide between these several designs.


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## dcb (Dec 5, 2009)

fyi folks here design BMS's for fun so don't expect much production value.

caveats:

balancing: don't bother. More likely to hurt than help (except maybe oem units). If you can install a bms, you can manually balance, and it is rarely if ever needed. Just need an idiot light to tell you something is out of balance really. Ignoring something going out of balance and just letting it balance automatically is ignoring cell specific aging information anyway.

units that cause imbalance: This is just dumb.

diy packs occasionally are opened: deliberately or accidentally, if you break the circuit between two cells (or a cell fails open), whatever is bridging the gap will be exposed to high reverse voltage, and if it is level shifted signaled or multi-cell vs isolated it can cascade. 

power draw: keep it very tiny or it will kill more batteries than you can count. having zero draw when not charging or running is ideal. A lot of batteries have died just sitting there. powering the bms via isolated dc converters is one, albeit expensive, method. op amps can reduce the voltage sensing load. Or an opto-controlled mosfet on the divider/cpu power, etc. etc.

accuracy: you probably still need a calibration method/rig after assembly. could be software (eprom) or some solder pads on unused logic pins or (gag) trim pots.

network speed, reliability, noise immunity, vs ease of installation, cost/etc: Depending what you are hoping to accomplish, having all the nodes measure the cells at exactly the same time (combined with a concurrent overall current measurement) might be important. Or it might not be. It is often acceptable to trigger a concurrent measurement with a broadcast, then go back and collect the results individually. 

Bus type networks have addressing headaches though, i.e each node needs to be addressable, and often that is more solder pads for the end user or firmware/eprom updates to give it an address. And to give more meaningful messages to the user the address has to relate to the battery cell in question.

plus you should consider stuff like twisted pairs (power, signal/ground or differential, constant current (i.e. digital 4-20ma), possible clock lines, sr lines, etc. etc.). 

for simple installation, I tend towards a uart token-ring style (preferably with hardware majority vote and an xtal). As it just needs a twisted pair between bms nodes, and can handle automatic addressing easily on initialization. If you are brave you can level shift between nodes, but otherwise it is just an opto per interconnection. It doesn't do concurrent readings, but it works. And you can add low power/sleep modes that wake on signal (just keep pinging the first node from the bms controller till it hears back from the last node), lots of protocol fun.

And having said and learned all that, this is what I use on 48v systems  (monitor it like you would a gas gauge as it also gives you the pack voltage if you multiply the reading by 2, if the numbers get too different then time to investigate)


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## rev0 (Oct 7, 2017)

Solarsail said:


> The DG408 idea is interesting PStechPaul. Would a digital isolator be different from an optoisolator?
> 
> With 10 bit resolution, that would be 0.005V, assuming the range is 0 to 5V? My feeling is that this may be sufficient resolution. If so, then all optoisolators could be eliminated except for one, when we use one MC per cell. I think an ATmega can be as cheap as $2.00. And there would be no need for precision voltage division. My gut reaction is that this is superior to using a specialized BQ7693 chip. But a nuanced analysis would be required to decide between these several designs.


 Yes if you did one microcontroller per cell you could get away with it, there are some very small/cheap ATtinys, the ATtiny102 is $0.36 each (lower in bulk) and has a 10bit ADC. You need to consider voltage reference, the on board 1.1V bandgap reference is only accurate to a few % and varies over supply voltage and temperature. There are very few reference ICs they have supply current at the uA level so you may want to just use a TL431 or similar but switch it on only when needed.

As for balancing and whether it's needed, yes it's very much needed for an 18650 type pack, please see the conclusion to my experiment here: http://www.diypowerwalls.com/t-Pack-Cycle-Testing 

After around 40 charge/discharge cycles at room temperature in a lab environment, even charging only to 4.125V/cell, one cell already got out of balance enough to charge at greater than 4.2V during the charge cycle and I had to end the test. I don't know about you but I don't want to have to crack open my pack once a month to manually balance it. Note this was with a pack balanced to within 30mAH or so also. You can't expect it to be as well balanced as a proper EV battery with all cells made on the same factory line like a Nissan Leaf pack.


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## Solarsail (Jul 22, 2017)

dcb said:


> And having said and learned all that, this is what I use on 48v systems  (monitor it like you would a gas gauge as it also gives you the pack voltage if you multiply the reading by 2, if the numbers get too different then time to investigate)


Thanks DCB - very interesting. My first pack, a 14s10p has the same BMS as yours! Except there are 4x4PDT selectors and a switch that allows me to inspect each cell manually. Also using one 4 digit Vmeter.

Another option is to use 4 DG408s and two Vm and two counters and pushbuttons, and is just too much work.

I reckon that if using new 18650s one is not cycling too often and only charges to 4.15V, then it will take a long time till things go out of balance.

Nevertheless I will use a cheap brainless 14s balancer-protector board.


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## rev0 (Oct 7, 2017)

Here's what I've got for my board (using a dedicated 12-bit ADC, 8 dividers (switchable using P-FETs) and 8 balancers. Board to board communication is still with an isolator but can make a version with just a divider/level shifter for the packet forward approach:

Board is 3.05x1.25", haven't finished routing, just initial placement.









Schematic for the balancers:

















Schematic for the Vsense section:









Solar, if you'd be interested in collaborating on the firmware side I'd be happy to handle hardware design/test/build. I hate writing code but I can do it if I have to


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## dcb (Dec 5, 2009)

imbalance inducing bms alert

if this was the type of monitoring you used in your cell test then it is no wonder it went out of balance. Also stop charging them to 4.2v.


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## PStechPaul (May 1, 2012)

A 10 bit ADC with an 8:1 divider has a resolution of about 0.004 volts. A 12 bit ADC would make that 0.001 volt. Except for the bottom cell, readings would need to be calculated as the difference in readings for successive taps. A differential ADC might work, but requires two multiplexers.

It might be possible to design a flying capacitor circuit where MOSFETs on adjacent cell taps would take a sample of the cell voltage desired, and then another pair of MOSFETs would apply that capacitor to the ADC. This would eliminate the voltage divider and allow full 10 bit resolution. The current draw for the first sample would be significant, but for subsequent samples the only current would be that required to stabilize the reading, and would even provide some charge balancing when the capacitor charged to a high cell would impart that energy into a lower cell.

It has been considered previously:

http://americansolarchallenge.org/ASC/wp-content/uploads/2013/01/SAE_2001-01-0959.pdf

http://www.google.com/patents/US7362588

https://patents.google.com/patent/US8786248B2/en

http://www.utdallas.edu/essl/projects/charge-balancing-problem/

https://www.edn.com/design/analog/4334442/Analog-multiplexer-uses-flying-capacitors


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## Solarsail (Jul 22, 2017)

*Re: The 18650 - 14s10p Project - 48V x 34Ah*

Wow - thanks. What a productive set of replies from everyone here. Can't wait to find the time to study these in depth, and complete this project and thread.

As for my other 100kWh 14s or 27s project, I am leaning to used Tesla banks. But the Tesla BMS would be problematic as it is designed for 96s. 

That does not mean I wish people to have crashes in their T3 - but to get my hands on some 2170s, I may have to cause some totals.  Just kidding.


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## Solarsail (Jul 22, 2017)

*Re: The 18650 - 14s10p Project - 48V x 34Ah*

Wow - thanks. What a productive set of replies from everyone here. Can't wait to find the time to study these in depth, and complete this project and thread.

As for my other 100kWh 14s or 27s project, I am leaning to used Tesla banks. But the Tesla BMS would be problematic as it is designed for 96s. 

That does not mean I wish people to have crashes in their T3 - but to get my hands on some 2170s, I may have to cause some totals.  Just kidding.


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## rev0 (Oct 7, 2017)

I'm now looking at trying to make the simplest possible single cell stackable BMS. It's an interesting challenge but some things get easier/more elegant. So far it's looking like 3 FETs (1 for level shifting for communication between boards, 1 for enabling the voltage divider and voltage reference, and 1 for balancing), 1 shunt voltage reference, and an ATtiny102. I think communication could be as low as 2 bytes per board (shunt bit + 7-bit board ID, 8-bit cell voltage) or a command byte. Cells would be read out in groups of as many as can fit in the RAM space of the ATtiny102.


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## dcb (Dec 5, 2009)

rev0 said:


> I'm now looking at trying to make the simplest possible single cell stackable BMS.


"attiny24"
why do you need a divider though, and a voltage reference in that case? 

fwiw, this is a pretty deep rabbit hole though, and you should know how to program to work with microcontrollers effectively. I did sort out an assembly routine for the tiny44 once (same as 24), no hardware uart made assembly the only choice for timing (literally counting instructions). It had majority vote, and I reduced the frame size (below what a typical hardware uart would allow) so it would be good without a crystal oscillator, in daisy chain (tx of cell 0 goes to rx of cell 1, etc). Auto addressing (command packet had counter that each node stored and incremented and forwarded). chain functions, like just give me the max voltage in the string, or the min voltage, or the sum, plus individually addressable voltages, with room for a temperature reading as well (thermistor, with max and min chain commands and apa), plus an led to help troubleshooting (i.e. follow the chain till the led's stop lighting for network problems, or look for the blinking led to identify the battery in question) and sleep/wake modes. 

It wasn't one cpu per cell though, but easily modifiable for such, it is literally just the cpu and an opto for bare minimum at that point since the voltage range is acceptable. Though you still may need a calibration step after assembly (and it might need to measure vcc and internal temp to be accurate).

so while "simplest" can be optimized for hardware, it doesn't make the software (the part you are avoiding  ) simpler. Siloing hardware from software in microcontrollers while trying to optimize is a bad mix. If you can wash your hands at the programming side, then by the same token the programmer can wash their hands at the hardware side, and just make whatever you give them work, more or less, suboptimally.

Though I'm concerned that you are ignoring very relevant comments regarding methodology, as if you see fortune in this direction, and that is what kills batteries and floods the market with junk. I think you missed that ship by about 8 years though.


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## rev0 (Oct 7, 2017)

dcb said:


> rev0 said:
> 
> 
> > I'm now looking at trying to make the simplest possible single cell stackable BMS.
> ...


The internal bandgap reference is only good for +/-10% in ideal conditions, clearly a better reference is needed. A divider is needed to get the cell voltage below VCC which would itself be the voltage reference of 2.5V (common reference value below 3V). 

Trust me I hear you about the challenge and problems of making a custom board and programming it, I still don't think it's the way to go for my project, this is more a fun academic exercise for me, if others find this work useful I'll continue, otherwise not much has been lost except time.


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## dcb (Dec 5, 2009)

rev0 said:


> The internal bandgap reference is only good for +/-10% in ideal conditions, clearly a better reference is needed.


Not if you know that there is also an internal temperature sensor and calibrate it (in flash/eprom) and also account for vcc changes (and have that calibrated). A lot of things can be made to be software problems, that is why knowing programming (and data sheets) is important for "simplest" hardware with microcontrollers. And even with an external reference you need to calibrate the ADC as part of the assembly/programming step, and account for changes in vcc and temp probably too if you are trying for accuracy, only now the temperature of the reference isn't as tightly coupled to the internal temp sensor...

Did you know the attiny24 also has differential adc and an op amp? (which, sigh, also needs calibrating, and very careful hardware considerations)


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## rev0 (Oct 7, 2017)

dcb said:


> Not if you know that there is also an internal temperature sensor and calibrate it (in flash/eprom) and also account for vcc changes (and have that calibrated). A lot of things can be made to be software problems, that is why knowing programming (and data sheets) is important for "simplest" hardware with microcontrollers. And even with an external reference you need to calibrate the ADC as part of the assembly/programming step, and account for changes in vcc and temp probably too if you are trying for accuracy, only now the temperature of the reference isn't as tightly coupled to the internal temp sensor...
> 
> Did you know the attiny24 also has differential adc and an op amp? (which, sigh, also needs calibrating, and very careful hardware considerations)


Yes it probably would be better to start with a more capable microcontroller and work down from there (the ATtiny102 is a factor of 2 cheaper, and correspondingly less capable, no temp sensor, no EEPROM, less RAM and flash). Just thought I'd share that I do have significant experience with programming microcontrollers at low level (C and some in-line assembly for precision delays when needed): http://rev0.net/index.php/Main_Page To prove I'm not an armchair philosopher 

I would be interested to review if you had completed or documented your BMS you mentioned with a similar approach.


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## dcb (Dec 5, 2009)

ah, RC enthusiast! (I like the sailplanes)

Just FYI a lot of the research shows significant degradation in lithium batteries if charged fully to 4.2, i.e. in my leaf I used the timers to set it to %80 charge and keep it out of the red, as has been discussed on the mynissanleaf forum. Also sitting at full charge is bad, and if it is hot then it gets worse, so the low voltage you reported at receiving is actually a reasonable long term storage voltage (%30 SOC IIRC). I charge my leaf cells to ~4.1v. Over charging and discharging reduces cell life exponentially so that you get less total energy out of the cell over its lifespan. I know the RC guys tend to max it out and just replace the pack more often, and cell phones want to maximize their battery claims, but on car scale that gets expensive.

This is part of the battery management domain that you are entering. 

I think you missed my point on the cpu though, the attiny24/44 can get reproduce-able results with minimal external hardware, and is cost effective even at the 1 cpu per cell level, but it is a large initial software cost, plus building a test/calibration rig that you validate each unit produced. And you are likely to run into the same problems with any microcontroller, unless you pay a lot for it. The devil is in the details as they say.

So for a "cheap" personal pack, it doesn't make a lot of sense to get fancy with the bms hardware either. If it costs 3x the cost of the battery, then just get 4x the battery instead and simplify the monitoring.

also there are concerns with the stated need for balancing, I think there may be errors in your testing procedure, and you are comparing 1p to 10p). But you are claiming without really backing it up that there is a need, and you have the solution. It is rather circular. Like inventing a bms with built-in imbalance then using that as the reason for adding balancing. Then saying you don't want to "crack open" the pack when you know each cell will have a lead routed externally anyway...

There are a lot of holes in the reasoning here, and in the implementation, and this is for an extra 5 miles range on a leaf? Do you have any idea how to interface with the leaf battery?

I guess the problem is you are saying things as absolutes, but you haven't done all your homework yet or properly backed up those assertions, despite being told to the contrary from numerous experienced folks.


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## rev0 (Oct 7, 2017)

dcb said:


> ah, RC enthusiast! (I like the sailplanes)
> 
> Just FYI a lot of the research shows significant degradation in lithium batteries if charged fully to 4.2, i.e. in my leaf I used the timers to set it to %80 charge and keep it out of the red, as has been discussed on the mynissanleaf forum. Also sitting at full charge is bad, and if it is hot then it gets worse, so the low voltage you reported at receiving is actually a reasonable long term storage voltage (%30 SOC IIRC). I charge my leaf cells to ~4.1v. Over charging and discharging reduces cell life exponentially so that you get less total energy out of the cell over its lifespan. I know the RC guys tend to max it out and just replace the pack more often, and cell phones want to maximize their battery claims, but on car scale that gets expensive.
> 
> ...


Understandable about your skepticism of my project, I never really explained the "big picture" anywhere. I bought a Leaf with 100k+ miles on it and a battery at death's door (only 5 capacity bars), which I had replaced with cells from a 2013 just a couple weeks back, I'm pretty well aware how expensive it is (the replacement pack cost me twice what the car did). I originally intended to buy a Leaf with a few bars missing and supplement with lost range with a modular system such that I could add more 1.2kWH packs whenever I had the time and money to. I was inspired to take on an EV project by the likes of Jehu and his video about how a DIY built car got 700+ miles of range using recycled batteries. I'd like my Leaf to be able to scale someday to a couple hundred miles or more if I came across a good deal on batteries, and as battery tech and energy density increases over time as well.

I'm new to the EV world, true, but very familiar with Li-Ion batteries and how they degrade, and how to take care of them to prevent such. The Leaf only charges to a max of 4.125V and discharges to a min of 3.4V, which is already conservative, even at "100%" charge cycle. I've seen most of the implementations of range extenders on Leafs as well, with my favored route being to tap in right after the battery connector (after the battery's internal contactors), and monitor the contactor signals to know when to switch in the extender pack and when to disconnect it. I've got the HV connector (both sides) already to make an in-line tap, and I'm trying to get a hold of the circular connector which contains the CAN bus signals and contactor relay controls.

So for my first 96s2p pack, cell balancing will be relatively important, there's not much in parallel to offset the effects of cell imbalance. As I add more packs in parallel (every cell will be in parallel with the original pack by connecting together the balance leads) the system should get progressively easier to balance. I also am skeptical about how required balancing is, I've done the reading from both sides of the argument, and there just wasn't enough data to convince me one way or another. My preference is to be able to monitor all cells and make the judgment on my own whether balancing is needed or not, but the extra hardware is only a few extra cents when designing a custom board, so why not add it. And as a disclaimer again, I will be using a Nissan Leaf BMS for my project, which already has the automotive grade HW to monitor and balance all 96 cells with proper isolation, and a nice Android graphic interface on top  I'm just looking into my own BMS for the fun of it, maybe to use in other projects.


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## Solarsail (Jul 22, 2017)

rev0 said:


> I'm now looking at trying to make the simplest possible single cell stackable BMS. It's an interesting challenge but some things get easier/more elegant. So far it's looking like 3 FETs (1 for level shifting for communication between boards, 1 for enabling the voltage divider and voltage reference, and 1 for balancing), 1 shunt voltage reference, and an ATtiny102. I think communication could be as low as 2 bytes per board (shunt bit + 7-bit board ID, 8-bit cell voltage) or a command byte. Cells would be read out in groups of as many as can fit in the RAM space of the ATtiny102.


I am trying to get my head around this. In one of the other designs linked, there was no need for disabling the voltage reference for balancing. Only one FET for the balancer and the voltage reference appeared to draw current only when voltage exceeded reference?

Is a FET needed for level shifting communication? Communication is one way from upper to lower board only, and is serial. Could you not use another zener/resistor to drop the voltage so that when out is low, there is no current drain? Assuming daisy chain serial communication, it can be as many bytes as you want, and you want it to be synchronous (token ring) and periodic I think. If the controller detects no pack charge or discharge, then it would minimize the polling, and eventually put all on standby. A data space of 128 bytes would be sufficient with logarithmic coding of the voltage. No board ID needed in the packet, as position of data is the ID.

I think the stackable BMS architecture makes a lot of sense. A lot more elegant, and replicative, configurable and extensible. A minimalist design that can be ported to a variety of power packs. And all the parts are off-the-shelf and the complexity is migrated to the software, which is a lot easier to hack than circuit boards and specialized ICs. No CANbus or proprietary decoding.


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## dcb (Dec 5, 2009)

Solarsail said:


> Is a FET needed for level shifting communication?


FYI an npn-pnp pair can level shift as well, the problem is the difference in potential where the cpu are referenced and the protection diodes on the io pins will clamp high or low (thus protecting).

fwiw there is a lot of bms discussion and a fair amount of my own blather here:
http://www.diyelectriccar.com/forums/showthread.php/bms-design-guidelines-82646.html










though I should maket an update to the resistor network post, as it has a problem. And the current shifting version after this diagram should have better noise immunity.


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## rev0 (Oct 7, 2017)

Solarsail said:


> I am trying to get my head around this. In one of the other designs linked, there was no need for disabling the voltage reference for balancing. Only one FET for the balancer and the voltage reference appeared to draw current only when voltage exceeded reference?


Yes, there's a few ways to use voltage references, this would work also if you wanted to only top balance, but you wouldn't have direct control over the balancing if you wanted to balance at a different state of charge. The voltage reference draws a minimum of 40uA for the one I saw, lower power ones exist but are more expensive.



Solarsail said:


> Is a FET needed for level shifting communication? Communication is one way from upper to lower board only, and is serial. Could you not use another zener/resistor to drop the voltage so that when out is low, there is no current drain? Assuming daisy chain serial communication, it can be as many bytes as you want, and you want it to be synchronous and periodic I think. If the controller detects no pack charge or discharge, then it would minimize the polling, and eventually put all on standby. A data space of 128 bytes would be sufficient with logarithmic coding of the voltage. No board ID needed in the packet, as position of data is the ID.


From my calculations you would always need a FET, in the worst case, say you had a divider/zener setup, you set output low on the top MCU, the voltage is then VCC of the bottom board (GND of the top board = VCC of the bottom board), your voltage divider would divide that by say 3.5 to meet the Vil requirements of the bottom MCU, then Vin to the bottom MCU is VCC/3.5. For the high case, you need to exceed Vih requirement of the bottom MCU, with the same 3.5 divider your Vin would not be high enough. There's not a single divider value that meets both criteria over the worst case ranges (cell 1 voltage = 3V, cell 2 voltage = 4.2V, and vice versa). If you want it to work over a narrower range, sure that's fine, but that's a limitation you'd need to be aware of. With a P-FET, the output is true 0 to VCC of the bottom device. The output pin of the MCU however is clamped to its own GND and VCC via internal diodes.

Just so I'm not crazy I threw it in LTspice and it works:


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## dcb (Dec 5, 2009)

re: simplest 

http://www.t4f.org/projects/open-rfid-tag/the-simplest-possible-rfid-emulator/


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## rev0 (Oct 7, 2017)

Here's the schematic/layout for the "1s" stackable BMS:


















To keep the ATtiny102 (for lower cost and smaller package) and still have a temperature sense function, I added a thermistor which would only be active when the ADC is enabled (supply is ADC_EN pin), and would be read out on the BAL pin, which is normally an output to control the shunt. This has the obvious downside of turning on the shunt when the temperature is below 15 C (depending on the threshold voltage of the shunt N-FET), but you could look at it as a plus of having a free battery heater circuit 

The board is 0.425 x 1.175". Could be optimized a bit further, this is just a first pass to connect all the nets together.


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## Solarsail (Jul 22, 2017)

rev0 - I will be happy to do the coding once you have your stackable design completed and there are samples produced. After all, ahem, I was a C programmer a couple of decades ago -  . Also need a controller design.


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## Solarsail (Jul 22, 2017)

Another example of a MC based stackable BMS and level shifter.

http://www.diyelectriccar.com/forums/showpost.php?p=917698&postcount=84

I hope the ATtiny has all the necessary functions for the job and easy to program/debug. Cost should not be the deciding factor for the MC, I think.


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## rev0 (Oct 7, 2017)

I'd suggest we start a new thread and define some solid goals, otherwise we'll all be trying to work toward different goals. My goal was cost and simplicity, which was achieved using a Nissan Leaf BMS. Your goal seems to be a stackable/flexible system with more capability. I might also add that assembly effort should be a consideration; with a multi-cell system, you only need to solder a balancing lead to the pack, rather than soldering 2 wires to the + and - of every series cell/group.


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## Solarsail (Jul 22, 2017)

Yes, a multi-cell system (8 or 16 balancers) on one board makes more sense. The microcontroller can sense if there is a voltage present, and if not, just act as a message relay. Also the main controller can go on the board, plus any other stuff needed such as optoisolator, current sensors, LCD display drivers, control buttons, and current cutoff FETs. The LCD display could be eliminated if there is remote console. So by stackable I do not mean individual balancers, but a daisy chain. They would want to be on one board.

Simplicity is paramount. For me there is no difference between a cost of $0.5 or $5 per MC, if the better MC has more storage and is easier to program/debug, better ADC, Rx Tx, etc. I don't have the experience, so I cannot really comment on stackable vs. Leaf BMS. I would consider Leaf BMS to be more complex, and certainly less flexible. For example the stackable can be used for LFP or 4.35V LiPo. And there will be other battery technologies in the future coming down the pipeline.

Of course when I get to the point where I am able to program an ATtiny or ATmega, I would know more about the advantages/disadvantages.


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## PStechPaul (May 1, 2012)

The Microchip PIC16(L)F1783 has a 12 bit differential ADC and a fixed selectable internal voltage reference, and costs well under $2 in moderate quantities. The "L" version is limited to 3.6 volts, otherwise max 5.5 volt supply.

I have also considered the possibility of measuring the voltage on several taps of a battery pack by applying the voltages through MOSFET switches to a resistor and a capacitor connected to a comparator, and use the time of charging to determine the voltage. As long as the resistor and capacitor values are known and stable with temperature, the time can be determined very accurately to as many as 16 bits. A mux like the DG408 can be used up to 44 volts, but otherwise higher voltage MOSFET switches could read even higher. 

I haven't fully worked out details, but take an example of 8 cells at 3.2 volts each, with a 500k resistor and a 100 nF capacitor, and a comparator with a reference of 2.048 VDC. For the voltage at the top, 25.6V, the setpoint is reached in 4.181 mSec, while for the single cell at 3.2V, it takes 51.103 mSec. A 1 MHz counter would provide precision of 25.6/4181 = 6 mV, and 3.2/51103 = 0.06 mV.
0.


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## Solarsail (Jul 22, 2017)

PstechPaul - great idea. Is it going to be easy to implement?

You would still need a Mux to activate the FETs. And another Mux to drain the capacitor. And then a whole bunch of calibrations. And then another MC and optoisolator to report the findings. If you put 16 of these on a board, you would need to put a few DG408 in series. All can be done. But your first suggestion of a PIC16L may be simpler, and no need for bypass FET Mux, counter, oscillator, etc. me thinks ...


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## PStechPaul (May 1, 2012)

I think it would be easier to implement than you think. A single DG408 would allow connection of any of eight voltage points from 3.2V to 25.6V. Once the comparator detects the charge to the setpoint, the MUX would be turned off, and a MOSFET across the capacitor could discharge it for the next reading. All this can be done with 3 I/O pins for address select, one I/O pin for enable, one I/O pin for discharge, and one analog input for the comparator. Six pins.

The effect of each measurement would be the energy loss of 

0.5 * 100nF * 2.4V ^ 2 = 200 nanoCoulombs

The energy of a 10 A-h 3.2V cell is 32 * 3600 W-sec (Coulombs)

Even with one measurement per second it would take 3600/200 = 18E9 seconds or 5 million hours. Another way to look at it is that the measurement is equivalent to a maximum of 3.2V/500k = 6.4 uA which by itself would drain the cell in 10/6.4 = 1.56 million hours. In reality the sample has an average current of roughly 3 ua and a duty cycle of 51 mSec/sec or about 40 times less.

In an actual circuit, there will be other more significant current draw. I envision the microcontroller powered by the low cell in the stack, so it will lose more charge and eventually become unbalanced. But the same circuit could be used to perform charge balancing by discharging the other cells through the sampling resistor, and keeping the discharge MOSFET across the capacitor ON. The 500k would only be 1.6 uA on a 3.2V cell. Another problem is that all cells from the chosen tap on down would be discharged, so that might not work as desired. However, adding an opto-isolator and load across all the upper cells would probably do the job with minimal additional components. And, of course, fully selectable cell discharge could be done with eight isolators and resistors. This could easily provide 20 mA of load.


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## PStechPaul (May 1, 2012)

Here is a preliminary design:


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## Solarsail (Jul 22, 2017)

Wow! Terrific. Thanks. More food for thought.

I like it - it does away with the shunt FETs and the multiple MCs. Certainly wins the simplicity beauty contest.

Hmmm ... I don't see the balancing act. I think you said that the same sampling circuit will be used to bypass and top balance?

What does zener D1 do? And why are Tx and Rx unused? What are PGC and PGD, do they go to the optoisolator for the next board? Would you also be drawing the over and under voltage cutoff FETs?

Can DG408 handle the bypass current? I think the specs said 100 ohm, which would be too high. Should be below 40 ohm. Maybe three DG408 in parallel?


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## PStechPaul (May 1, 2012)

The idea was to provide a very small amount of balancing to compensate for the additional current from BT1, which is used to power the PIC. But then I realized that it would drain all cells below the chosen tap. So that won't work. 

I show an opto-isolator U3 that is not connected. If I used a 28 pin PIC there would be eight more I/O pins each of which could turn on 8 isolators that could be connected across each cell in the stack, to draw as much as 30 mA from selected cells to perform balancing. Actually, it could use a quad darlington opto that can handle up to 160 mA per channel, and costs only about $2:

https://www.mouser.com/ProductDetai...EpiMZZMteimceiIVCBy62mdAgfQXXHOTA%2bTID%2bVg=

D1 is actually a Schottky diode that isolates the PIC Vdd from the cell BT1. It might not be needed. Actually I thought it might be better to power the PIC using an inexpensive DC-DC converter from the 12V accessories battery. But I think the ideal design would be self-contained and run off one of the cells.

The Tx and Rx are the serial connections to the USART. I planned to connect those signals to a Bluetooth module for communication with a computer or a "motherboard" that would handle communications. I haven't fully thought through this part of the design. Another method would be a daisy-chain from module to module, possibly using opto-couplers or digital isolators or other method. Power consumption must be considered. Bluetooth modules draw something like 20-50 mA.

PGC and PGD are just the programming pins.

I would also like to design the dynamic charge shuttling version that requires two DG408s. It might even be able to extract voltage from each cell and transfer it to the PIC power supply. It should be easier to implement, as it would use the full range of the 10 bit ADC for each cell measurement. DG408 is inexpensive - a little over $1 in 100 piece quantity.


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## Solarsail (Jul 22, 2017)

Well, cell shunting is really needed - having one optoisolator shunt per cell - sounds very interesting and creative. At 600 mA per IC quad optos, heatsinks would be needed. It is sort of an overloading of the concept of an opto to use it as a shunt ...

How about two DG408 and shunt shuttling? Again the problem will be the high impedance of the DG408. 

Also pls note that the accuracy of BT8 sensing is far less than BT1. Because you would need to subtract BT7 from BT8, and these are two high voltage senses.

I am not familar with a Schottky - how would that isolate VDD from BT1? After all, VDD is being supplied by BT1.

The board needs to communicate to a central MC to do the over and under voltage cutoff, and also to communicate to sibling boards, because 8 cells are just not enough. So I think there should be a half-duplex opto to daisy-chain boards. If let's say 27s cells are being managed with four boards, then blue tooth may be a problem.

Charge shuttling - not worth the trouble. Just drain BT1 with balancing and standby for the PIC.

I think one really needs a board with at least 16 cells instead of 8.


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## PStechPaul (May 1, 2012)

The opto-isolators for shunt balancing are probably most effective and relatively inexpensive. Resistors should be added rather than dissipating the power in the device. Something like 10 ohms for 300 mA at 3 volts. Only 900 mW. Might be able to use a 1 watt LED instead?

The precision of the top voltage measurement is only 6 mV because of the limitation of the maximum count for the single cell measurement. Perhaps a two channel by 4 MUX like the DG409 could be used. One set of four switches would use 250k resistor and 220 nF capacitor would take 9.6 mSec for the 4th cell at 12.8V, so 9600 counts and 1.3 mV resolution. The first cell 3.2 volts takes 56.2 mSec for 0.05 mV/count. The higher 4 cells could use 500k and 470 nF, so 24.8 volts takes 19.6 mSec and 16.0 volts takes 32.2 mSec. That represents 1.2 mV/count and 0.5 mV/count.

Another "trick" would be to change the setpoint of the comparator to 1.024 volts to reduce the number of counts for the lower voltages. And also it's possible (and maybe easier) to change the clock rate for the counter depending on the voltage tap to be measured. 

The isolation of the power supply from BT1 with the Schottky diode just allows the voltage to stay constant (depending on the power supply capacitor and load), if the battery voltage drops because of a heavy current load on the pack. It may even be good to use a small lithium cell to power the controller without drawing anything from the pack, except the 25.6 volts for the DG408.

Communication could use the Txd and Rxd from the USART, through digital isolators. The Si8621A has two channels, draws less than 2mA, handles up to 1 Mb/sec, and costs about $1.00.

https://www.mouser.com/ProductDetai...D0wnx/ymM3bPDptwQTOS6S9E8Ss2%2bohTUaCHX6VnQ==

This discussion has been interesting, but perhaps it should be transferred to that for BMS guidelines.


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