# SiC LLC modular charger design



## Tony Bogs (Apr 12, 2014)

The LLC CONVERTER PWR PCB layout for the double insulated charger.


----------



## bigmotherwhale (Apr 15, 2011)

very nice layout
have you ever tried reflex charging?


----------



## Tony Bogs (Apr 12, 2014)

Thanks and no.
First layout corrections: low loss caps and gate zeners. First test probably end of this week.


----------



## Tony Bogs (Apr 12, 2014)

I've had a quick look at reflex charging. 
First impresssion: great for NiMH (memory effect) and lead-acid (loosen phosphate deposits).
I'm designing a charger for LFP batteries (obviously the best DIY choice ). 

The high LLC resonance (transformer) leakage inductance
(cause: large distance between primary and secondary for isolation)
means that the Q factor will be extremely high 
when a battery is directly connected to the LLC output. 
This presents a major challenge for the frequency setting. Not practical.
Solution: a hysteresis controlled SiC buck stage between output and LLC.
Results in a high Rac load for the LLC. (Q=SQRT(L/C)/Rac)

The Q factor still remains high for LLC (~7 at max load). 
Allowing ZCS doubles the bandwidth for frequency setting (gain>0.95). 
To prevent high losses, it's going to be an all SiC design.

LLC frequency: 135 kHz


----------



## bigmotherwhale (Apr 15, 2011)

Yeh i have seen and used reflex charging for lead a NiCad, but i have only seen a hand full of articles on using it on Li chemistry, one used a ZVS inverter and the reports were quite positive so i think its something that needs more research into, someone should make a small one for testing 18650s and compare it to cccv over a few hundred cycles to see what happens.


----------



## Tony Bogs (Apr 12, 2014)

And at least a few hundred batteries for a statistically significant result. 
The papers I've read on LFP charging indicate that CV charging is not a good idea, especially at high voltages.
The charging strategy I am going to use is almost reflex, CC mode. With one big difference: no discharge cycle (can't see any positive effects for LFP). 
The rest cycle is very short, only there for measuring the float voltage to determine the end of charging (eleminating internal resistance related errors). 
At what voltage? Again, statistics. To determine the voltage at which a high SoC can be reached with only a very little chance (the statistics part) of overcharging a cell. 
Then, for that tiny chance of a failing cell, the xS imbalance detection method can be determined, weighing cost, ease of use, mass etc. 

SiC in ZCS mode. I've done the math.
Based on 2.5A pk at turnon, ~10% of the maximum tank current , since the ZCS mode stays close to resonance where the tank is mainly resistive. 
Cree SiC C2M0080120D mosfet: approximately 10W switching loss per mosfet, IXYS Si IXFH44N50 more than 40W. 
Both at 135kHz with SiC Cree diode C3D20060D antiparallel.


----------



## Tony Bogs (Apr 12, 2014)

And a layout for some corrective measures to keep V/I in phase. Assembly starts tomorrow.


----------



## Tony Bogs (Apr 12, 2014)

I've found the name for the charging method I'm going to use. It's: *step current.

*This paper describes the method and the underlying runtime model:

Min Chen and G.A. Rincon-Mora, "Accurate electrical battery model
capable of predicting runtime and I-V performance", in IEEE
Transactions on Energy Conversion, vol. 21, no. 2, pp. 504-511, 2006

users.ece.gatech.edu/rincon-mora/publicat/jrnls/tec05_batt_mdl.pdf

First time I saw "step current" was in this paper (Danish Technical Uni):

http://orbit.dtu.dk/files/9852018/Paper_EV_charge.pdf

Figure 3 on page 3 shows the pulse step charge / discharge curves. 
The increase in internal charge resistance is very clear @ 85%.
That's about where the charging should stop. 
The exact point for a multicell pack depends on LFP performance statistics (distribution). 
Haven't found a reliable source for it yet.


----------



## Tomdb (Jan 28, 2013)

The last layout you posted, is this just a buck stage for regulation?

Love to see some update schematics of your complete test setup, or has that no changed?


----------



## Tony Bogs (Apr 12, 2014)

Maybe I wasn't clear enough, but the last layout is for the PFC.
Looks similar to buck with the mosfet/diode combo and L/C.
Buck stage is the last piece in the design for the power section. Hysteresis control.
No MCU PWM or timer channels involved. I want to keep the MCU section simple. It's a DIY forum. No z-domain in SW. More Arduino style.
Next in the design proces is input stage: filter / inrush limiter (R + relay)/ auxiliary supply.
The schematics are still changing. It's an iterative proces. But I've posted the basic topology of a module.

Here's the first sketch of the input stage of a module.


----------



## Tony Bogs (Apr 12, 2014)

A little bit PFC EE. The Infineon ICE2PCS01G needs compensation on both the I and V loop. 
The design is ready for testing. Examples of the I loop transfer function are in the attachments: SPICE small signal AC model and bode plot. 
Phase margin is more than 52 degrees.

Schematic PFC
All component values are on the new layout that I'll post when all checks are done (first PCB is in the waste bin). 
The schematic can be found in the design guide for the Infineon ICE2PCS01G. 
http://www.infineon.com/dgdl/Design...d24f8&fileId=db3a304319c6f18c011a336c455809ca

Small differences:


input cap (2u dc-link on bridge output)
IXYS gate driver added with a resistor divider input for Cree SiC


----------



## Tony Bogs (Apr 12, 2014)

The waste bin PFC PCB. Components are not soldered on. Size 100x160mm.
Rsense in parallel (should be in series), diode and mosfet pins too close to cooler, toroid mounting points way off. Pads too small. 

The first design is for 200 to 260V AC in, 390VDC, 3350W out. 
Two modules are probably needed for 110V, 60 Hz in, 390VDC, ~ 3250W out.


----------



## Tony Bogs (Apr 12, 2014)

The output of the PFC will be connected to a LLC converter in a boost configuration, converting 390V DC non isolated to 510V DC isolated.

But for the test of the PFC I want to use cheap heaters. Two in series.
Since they are resistive, the transfer function of the PFC changes dramatically. The Infineon design guide assumes a constant power load (f.i. a buck stage). 
If my math is right, the resistive load replaces a single pole at very low frequency (Hz) with a pole at the other end of the spectrum (MHz).
So for the test the V loop compensation has to be adapted. 
A PFC needs a very small bandwidth. Upper limit should be well below the line frequency.


----------



## Tony Bogs (Apr 12, 2014)

For a small scale test I'm going to use my 30W (60W pk) LLC protoboard, 325 to 450V in, 15V out, and an ordinary Li-ion 16850 notebook array.

In the picture: safety transformer (top), rectifier, protoboard, 25W Rload and the Li-ion batteries. The LLC transformer is on the opposite side of the board.

Goals: 
- find out how LLC performs with a battery load
- is it possible to directly switch LLC on/off for buck hysteretic control


----------



## Tony Bogs (Apr 12, 2014)

Great start (not really) of the 30W test: I connected the 18650 battery pack with polarity reversed to the output of the LLC. 
Clearly, I've mixed up the usual wiring scheme when I built the 30 W LLC protoboard. Yellow = GND, black = +V. 

Soon the smell of hot CuL wire filled the room. Seconds later the LLC controller protection kicked in. 
No damage except for the transformer (shorted wiring) and some warmed up (empty) batteries.

PFC PCB. The second version is OK.


----------



## Tony Bogs (Apr 12, 2014)

The first PFC test is a succes. Light load, two 40W light bulbs in series.
396V DC average. 

LLC, @Tomdb, the schematic for the measurement of the series resonant inductance of the transformer:


----------



## Tony Bogs (Apr 12, 2014)

Next stage in the design: the mains (line) input module. On the PCB are:


EMI filter
bridge rectifier and cooler
auxiliary power supply (Recom RAC06 and Linear LT3082 LDO) with 24V and 20V outputs, one with on/off control
inrush current limiting resistor and bypass relay
high isolation optocoupler control (Fairchildsemi FOD8320, 10mm clearance & creepage) for compliance with safety regulations
auto reset overcurrent protection ( 2 x PTC) for inrush circuit and AC/DC converter Recom RAC06


What is further needed for the high P (3250W) test of the PFC module?


FANS for forced cooling
a dedicated 16A/230V AC outlet (is available)
plugs and wiring for the two 2kW heaters (done)
2 mm CuL on the PFC toroid
Test is scheduled for this weekend. Assembly on saturday, test on sunday.


----------



## Tony Bogs (Apr 12, 2014)

The FOD8320 optocouplers are not in yet, so I soldered on leftovers from a project in 2006 / 2007: Avago HCPL3120. 
Bit messy, but it will do for testing. 

I've modified the PFC PCB layout again cause there was a huge c*** up in the Rsense connections.

First test: repeat light bulb low power test with mains input PCB. 

Relay and PFC controller switch OK. The scope clearly shows the differences between relay on/off , PFC on/off. 
At low load the PFC is running in DCM. 
SiC mosfet drain signal is very clean, no parasitic ringing at turn-off/turn-on. 396VDC DMM reading on the output.
The picture shows the MAINS INPUT PCB and PFC board. The PFC is upside down for better access to the SiC mosfet drain, exposing the Rsense fix (in green/yellow wire).


----------



## Tony Bogs (Apr 12, 2014)

"Pre-charging" for the 3.3 kW test, 1500W (two heaters set at 750W) was a succes. 
Still 396VDC on the DMM. Not a big surprise. The voltage control loop has a 1/s transfer function.


----------



## Tony Bogs (Apr 12, 2014)

All OK at ~2500W (2 x 1250W) and ~3400W (both heaters at 2kW). 
Well, all but the standard household mains switch that switched the heaters on. 
The only part that is clearly underrated for 400VDC/9A.

CuL on the toroids is now 2mm. And that is about as thick as one can get it on. 
Reduces the copper loss on the PFC toroid to ~7W in stead of ~30W at full load. 
There is a slight increase in core loss, since 66 turns is the maximum that will fit (with silicone tubing for insulation). 
Was 78 turns. So now 12 W core loss, worst case, = 2 W more. 
I'll replace the mains switch with mosfets for further testing. 

Soon: the resonant isolation LLC converter.
At the moment with an isolation distance of 3 mm (on the transformer).


----------



## PStechPaul (May 1, 2012)

I only just now found and caught up on this thread. Very good work and promising results! It may not be worthwhile for me to do much more on my concept if yours works as well as it seems to. I'd be interested in getting the boards and some of the components for my own use, possibly with some modifications. I still intend to build one or more electric tractors using lead-acid batteries of about 24-48 VDC, and will need a charger, although it would not need to be at this power level.

I would also like to explore the possibility of using a similar circuit to boost the 24-48 VDC to about 320 VDC (or even 640 VDC) for a VFD. As such, the output voltage would not need to be regulated, and just a simple 30:1 or 60:1 ratio would be fine.


----------



## Tony Bogs (Apr 12, 2014)

Well, so far, so good. Glad you like it, but it's not there yet.

Lead acid and boosting sounds great for a light tractor. 
I guess two 24V batteries, 200Ah, motor 20kW.
Speed is not important so even 10kW might do.
Seems feasible.

The LLC provides the high galvanic and CAPACITIVE isolation. 
I'm pretty sure I can get the 10mm clearance and creepage distances.
And probably more. 
The goal is a constant, load independent, LLC DC gain at series resonance under MCU control. 
So effectively, the PFC acts as regulator.


----------



## Vectrix150V (Dec 13, 2013)

Very impressive. That toroid on the PFC is a whopper!


----------



## Tony Bogs (Apr 12, 2014)

Thomas & Betts (ABB TYHT23M) tywraps with an extended temperature range (150C) and a stainless steel tongue should be strong enough to keep it in place at $0,50 a piece.


----------



## Tony Bogs (Apr 12, 2014)

The LLC (power stage) module has been assembled. 
It is the key module, because it provides the necessary isolation for the simultaneous use of multiple power sources with different voltages. 
Any voltage 90 – 260V AC 50/60Hz or DC 110 - 325V will do. 
At high input voltages the modules can operate at full 3250W output, 
but at lower voltages, for instance 110V, 60 Hz, power output has to be lowered. 
The maximum input current for the shown modules is ~18A DC/ AC RMS. 

For testing an ETD49 core is used. 
The final version will have the 3.3 kW full power ETD 59 core with 10 mm clearance and creepage distances and a very low capacitive coupling. 
It will be mounted perpendicular to the PCB.


----------



## Tomdb (Jan 28, 2013)

wow this is looking superb. 

Hope the testing goes good.


----------



## Tony Bogs (Apr 12, 2014)

Yep, there's no way this one can be ordered assembled from a major supplier. It's not an Arduino clone.

Pre 0-series is probably what it is. 
The first resonant converter I built back in the early 80's had a power rating of 150W with a similarly sized core.


----------



## Tony Bogs (Apr 12, 2014)

Next is control of the LLC. 
There's no off the shelf dedicated controller that can hold the LLC at series resonance AFAIK. So MCU control and monitoring is needed. 

The LLC will be operated in open loop. At series resonance, where the efficiency is at maximum and the DC gain is highly independent of the load. 
So a complicated analysis over a wide frequency range is not necessary.
Still interested in the full DSP analysis for a closed loop approach? This can be skipped: http://ww1.microchip.com/downloads/en/AppNotes/01477a.pdf 
The choice for an Arduino and SPI ADC is easily made. 
With SPI ADC's only a few digital lines need the full 10 mm isolation.
Regarding the software side: 
The Arduino IDE makes it easy to get started, the AVR Arduino's are supported by the open source community and the SPI functions are immediately available in the IDE top layer. 
Great for a homebrew project on a DIY forum.

As it stands now, Linear LTC1598 SPI 12bit, 8 channel ADC devices will be used. There's no need for high speed. All signals of interest are DC or LF.
There are two isolated circuits to be monitored: the input side (mains in, PFC, LLC primary side) and the battery side (LLC secondary, buck regulator, battery).

Short description of the MCU LLC control:
At timer tick intervals the MCU determines the DC gain of the LLC converter at frequencies close to resonance. Series resonance is just above the frequency where the gain is at maximum.


----------



## Tony Bogs (Apr 12, 2014)

The Fairchildsemi FAN7631 https://www.fairchildsemi.com/datasheets/FA/FAN7631.pdf will control the LLC half bridge. 
It handles soft start, bootstrap level shift, overcurrent and under/overvoltage protection, dead time insertion, .....
The goal is to keep the software effort minimal.
In stead of the usual optocoupler feedback circuit the LLC frequency will be adjusted using a SPI rheostat: the TI tpl0501 http://www.ti.com/lit/ds/slis136a/slis136a.pdf

Tranformer isolation.
For the isolation the large airgap and high leakage properties of the LLC will be used. 
The two halfs of the ETD59 core will be glued together with a copper free 1 mm FR4 epoxy board between them. 
No coil former will be used. Only FR4 spacers and high temp polyester film.


----------



## Vectrix150V (Dec 13, 2013)

I see - so you are using the SPI rheostat to control it via a microcontroller rather than using a feedback network. Interesting. 

This will only be for voltage feedback though? Or are you adjusting the CC value using the voltage control (makes sense).

Looking at the topology it has Rcs (current sense resistor) for current limiting. This would probably be more for device protection than constant current limiting.


----------



## Tony Bogs (Apr 12, 2014)

Thank you for asking. 

Capacitive current sensing (divider, less power loss) is implemented, but a ground sense resistor is also possible. 
Current sensing is indeed for protection, not control.

LLC with feedback voltage control (optocoupler) in a charger is very challenging, because the AC impedance of a battery is very low. 
The DC gain of a LLC is AC load dependent, with one exception: at series resonance, where the tank impedance is zero. 
That property is used in the charger design, since the input voltage is regulated (by the PFC, at 400V). 
Although the dynamic load regulation of the PFC regulator is very poor, that's not a problem in a charger, 
because the load varies very slowly in time.

A hysteric controlled buck regulator regulates the charge current. As “seen” by the LLC, the buck regulator has a much higher impedance than the battery, so some control is possible ( i.e. hold LLC at resonance).
The DC gain at resonance can be calculated. In this case 1.33. Rock solid with almost zero impedance. Almost, cause there are losses in the mosfet Rdc, winding resistance … 

With the SPI rheostat the microcontroller can hold the oscillator of the FAN7631 controller at the series resonance frequency, where the DC gain is 1.33. So one could call it a form of (hysteretic?) gain control.

Purpose of the LLC in the charger: provide voltage boost with high isolation and a very low capacitive coupling.

Another big LLC advantage: even below resonant frequency, down to the frequency, where the DC gain peaks, ZVS is maintained for the halfbridge mosfets. Thus, losses can be compensated (at least partially). http://www.diyelectriccar.com/forums/showthread.php?t=162082


----------



## Tony Bogs (Apr 12, 2014)

The SPI control and monitoring board layout is almost done. A few minor tweaks still to do. 
Control: LLC on/off and LLC frequency (SPI rheostat)
Monitoring: temperatures (eight), PFC input current, charging current (sense R, single module), battery pack voltage, 
LLC in- and output voltages, charging current (hall sensor, all modules combined) and brown out detect PFC input voltage (bridge out). 
One spare volt input.
Assembly is scheduled for saturday.


----------



## PStechPaul (May 1, 2012)

If this represents the silkscreen for the component side of the board, I would recommend adding reference designators so that they are visible after components are installed. Values, if desired, may be placed under components.


----------



## Tony Bogs (Apr 12, 2014)

No schematic yet (still pre 0-series), but I'll add references to the silk when boards are to be ordered pre-assembled (SMT part). To do so, I'll have to use the design package of the selected supplier.
The black stuff is indeed the silk layer in the 'prototyping' design software. I'm using it to create a printable overview of what part goes where for manual assembly.


----------



## Tony Bogs (Apr 12, 2014)

The SPI control and monitoring board is ready for the first (basic) tests.
The SPI rheostat and ADC's will be soldered on after the succesful completion of the first tests. 
I'll connect the board to an Arduino Due (with 32bit ARM processor), but since it is a SPI board (MCU independent, modular) many other development boards are suitable. 
Maybe I'll also try a STM32 with the GNU toolchain on a Linux system.

Several fixes were needed based on the first tests and checks:


LM1117I (cheap old LDO) didn't work, replaced it with a new one, no result, tried LT3082: does work.
Added parts: pull down resistor, zener protection for LT1461 inputs, opamp bias resistors (in case input is not connected), rerouting layout errors with pieces of wire wrap.


----------



## Tony Bogs (Apr 12, 2014)

The LLC is up and running. At low input voltage (24VDC), with a light load (<10W light bulbs) and at a frequency just below resonant. 
No ZVS under these conditions, there is ringing at the LLC transformer/SiC junction.
Measured voltages: input 24,43V, output 32,42V. DC gain is 1,327. Very close to the calculated (design) value of 1.33. 

Everything is looking OK for further tests with higher loads, voltages and frequency.

24VDC in, 40 Ohm load:
The reflected AC resistance is ~ 5. Half of the Rac ~= -10 at full 3300W load with buck end stage. 
Measurements show very little ringing at frequencies above resonant. 
The LLC will run at about 112kHz. 
With the SPI ADCs and rheostat on the board it's time for software.

OK, the Arduino Due controls the LLC frequency. Wrote a small program that varies the SPI rheostat resistance slowly min to max and back.


----------



## Tony Bogs (Apr 12, 2014)

The SPI board works with an Arduino Due: set the rheostat, read ADC and select ADC inputs. Picture of the test circuit is in the attachment.
More software needs to be written to hold the LLC at resonance. To test the software reliable interfaces / connections between Due, SPI board and the LLC power module are needed. 
Probably takes about a week to write the software and get the hardware ready.


----------



## Tony Bogs (Apr 12, 2014)

Scope still image and gzipped mp4 video (rheostat control) of the voltage at the junction of the SiC devices and LLC transformer (primary tank input). 
10V per division, 0.2 usec/div timebase. LLC input voltage app. 45V.
Clearly visible, there is still hard switching at this low input voltage, but as the frequency increases, ZVS (of the high SiC mosfet) is almost reached.
Jpeg: at 400 nsec the low SiC mosfet turns off, at 600nsec the high SiC mosfet turns on.
The ringing is normal under hard switching conditions.

In order to ensure ZVS under normal operating conditions, the dead time has to be increased.
The relationship between primary inductance, bridge capacitance, operating frequency can be found in: http://www.infineon.com/dgdl/Design...1.pdf?fileId=db3a304330f68606013103ebd94f3e98
The design calculations are based on a transformer with a larger airgap (special construction, lower primary inductance with a 0,5mm FR4 PCB as isolation barrier).
The tests are done with a standard ETD49 coil former.

At 90V and 325V input and with increased dead time still no ZVS. 
There is conflicting information in application notes about secondary side ZCS above resonance.
Earlier designs always had schottky diodes on the secondary side, so that's the first possible cause to investigate.

Yeah, recovery losses (second image): top trace is primary voltage, lower trace = secondary voltage. Secondary lags by about 400 to 500 nsec, which is the recovery time for the secondary Si diodes at low reverse recovery current. 
Conclusion: go full SiC (no recovery losses).

Found the pdf of the Cree 8kW reference design: 
www.cree.com/~/media/Files/Cree/Power/Articles%20and%20Papers/White%20Paper%20Highly%20Efficient%20and%20Compact%20ZVS%20Resonant%20Full.pdf


----------



## Tony Bogs (Apr 12, 2014)

Tests with SiC diodes are scheduled for this weekend.
Now that I've found the description of the high power SiC LLC reference design, I've placed an order a suitable 5 to 12kW ferrite set.

But it still too early to add "10 to 40kW AC&DC (solar)" to the title of this topic.


----------



## Tony Bogs (Apr 12, 2014)

YES, ZVS. 
Turns out I was running the LLC at 125-135 kHz in stead of 90-100kHz. 
Made a mistake when I measured the resonant inductance and forgot to change the timing on the LLC board. 
Maybe I'm getting too old for this stuff.

Never mind, the 4 diodes were only $12.
So let's crank up the power.


----------



## Tony Bogs (Apr 12, 2014)

First run @325V input, 150W load (light bulbs) went allright. That's great, considering that light bulbs are a much heavier load when cold (at startup).

For higher power levels the LLC needs a reliable cooling system (fans).

A construction like this one:
http://go.pardot.com/l/101562/2015-0..._Converter.jpg


----------



## Tony Bogs (Apr 12, 2014)

The high power ferrite set is in. Running at 250kHz in a full bridge LLC configuration, it *should* be able to transfer 10kW. The pen is about 5".

Test result, confirmed by Cree's description of the 8kW conventional LLC: certainly no need for SiC diodes on the primary side. Reduced losses.
SiC diodes on secondary side stay: reduction of dead time.


----------



## Tony Bogs (Apr 12, 2014)

Scope image of ZVS (zero volt switching) of bottom SiC mosfet.
Top trace: gate-voltage voltage, 10V/div
Bottom trace: Drain-source voltage, 100V/div
Time base : 1us/div
LLC load: two 75W light bulbs in series

The drain-source is already zero for about 250 nsec when the gate signal rises to turn the mosfet on.


----------



## Tony Bogs (Apr 12, 2014)

It took a bit of recycled steel (PC P/S cases and a heater lid) and a bit of quick cutting and spot welding to create a frame for the PCBs and fans.

High power test (3kW) with two heaters in series is scheduled for this weekend.
If all goes well, this topic will continue with 10 to 40 kW.


----------



## Tony Bogs (Apr 12, 2014)

No, didn't go all that well. 
Unfortunately, I had to switch to another computer system last weekend. 
The eight year old 2-core gave up.

And the PFC SiC mosfet died. Not SiC related, but the PFC controller is sensitive to the rise and fall times of the auxiliary power supply. 
So far I've always used a simple “plug a wire end in a connector” method for PFC turn on/off. 
This time the controller didn't reset properly.

The picture shows the test rig. The connector is above the PFC elcaps.

3kW test postponed to next weekend without PFC boost: 310V LLC input.
I'll order some fresh mosfets. Delivery may take three weeks.

The connector issue is easy to solve via the Arduino Due. For the 10kW+ design, I'll use drivers with desat and UVLO protection.


----------



## Tony Bogs (Apr 12, 2014)

With the convection heaters at 750W setting (total 1500W), the LLC didn't start. 
The overcurrent protection keeps kicking in.
It also kicked in a few times with a 150W load during startup. 150W light bulbs = 1500W when cold at startup.
So it seems to be a startup issue. 
The output cap probably isn't fully charged when the LLC reaches the high power frequency range. 
Next try: turn the load on after startup when the output cap is fully charged.

Time for the last one of the 3500W modules: the buck stage.


----------



## Tony Bogs (Apr 12, 2014)

The SiC 18 to 19V UVLO circuit for the GATE DRIVER SUPPLY. Not yet tested. 
SiC needs higher UVLO thresholds than the usual IGBT values (11 to 14V).
If the driver positive supply voltage is too low, the voltage regulator for the ACPL-339J optocoupler is shut down. The 339J then generates the UVLO fault feedback.
http://www.mouser.com/ds/2/38/AV02-3784EN_DS_ACPL-339J_2015-04-27-480718.pdf

The ACPL-339J will drive the high side SiC in the buck stage. Improved UVLO (with IXYS 609) in second image.
The 339J has a high thermal resistance and a low maximum junction temperature (125C). It can't drive the intermediate mosfets directly at high frequencies.
The modified PMOS drive circuit is in the third image. Similar circuit for NMOS is not shown.


----------



## Tony Bogs (Apr 12, 2014)

I've modified my half bridge inverter that I've used earlier, so it can be used as a buck stage. The frequency is set at 10kHz with duty cycle 0%, ~50% and 100% selectable with a simple jumper. 

The first (functional) check at 50% duty cycle, using light bulbs as load, went OK. 
Test result with heaters as load, 1500W, 50% buck, continous from startup: same startup issues as earlier, overcurrent protection keeps kicking in. 
Test was repeated with buck at 0% during LLC startup, then switch buck to 50%: OK. LLC output voltage at 350V. 
Next test was at 100% (1500W): shutdown.
So the LLC is at 750W now.

Done some more measurements. Seems to be the 20V power supply for the LLC controller. Can't supply enough mA.


----------



## Tony Bogs (Apr 12, 2014)

Saw a video yesterday about a very simple charger based on a rectifier and (hugh) capacitors as current limiters. 
Non isolated and a power factor as low as 50%  . But it is simple and it works. 
It remindend me not to overengineer things. 
Didn't work for the power supply for the LLC controller though. 
It is not possible to use the same P/S for PFC and LLC. 
There's a high current path in the LLC P/S return. Solution: an isolated converter for the LLC controller.


----------



## Tony Bogs (Apr 12, 2014)

The CCM current mode hysteretic buck controller. 
To keep it simple: no hardware SiC desat/UVLO/overcurrent protection.
Maximum output current app. 50A peak. Max output voltage: app. 500V. Min output voltage: app. 48V.

Protection features (left them out for clarity):
- Rsense can be used to detect overcurrent with a LM2903 comparator circuit, bypassing the Hall sensor 
- UVLO protection on the high side is half of the 339J UVLO circuit I posted earlier: just the 2903 and 431 sections.
- Desat is not needed here, because the low side of the power stage is passive (diodes). Short circuit is very unlikely.
The 10kW version will have a Si mosfet in parallel with the SiC diodes to reduce loss. With desat protection.


----------



## Tony Bogs (Apr 12, 2014)

The gate driver board with protection features: UVLO at 18V and -5V, desaturation, and a high power isolation DC/DC. "Borrowed" from the SiC inverter project.

During the test phase all SiC mosfets will be driven by the this circuit to reduce the risk of "bang" incidents. And SiC does go "bang" at these power levels.

The new set of SiC mosfets *should* arrive today. Along with most of the gate driver parts.


----------



## Windydrew (Dec 18, 2015)

I've got a Volt pack running full voltage. Looking for a diy charger to get me charged up between races. Subscribed


----------



## Tony Bogs (Apr 12, 2014)

Yeah, 390V is well below the 3kW module limit. 

The gate driver board with almost all components soldered on. 
First checks done. UVLO, LLC, hysteretic feedback, everything works fine. Only a few corrections (LT3082 pin mixup) and tweaks.

The 6 W LLC isolation transformer:
– Resonant inductance measured: app. 8.4 uH. Resonance at app. 160 kHz with a 100nF cap.
– LLC fixed frequency 200 kHz. Well above resonance.
– Q factor 0.8 at max load. Good value.
– Turns: primary 14 x 0,8 mm (to compensate for skin effect), secondary 2 x 29 x 0.4 mm.

About mosfet failures in LLC: 
fairchildsemi.com/application-notes/AN/AN-9067.pdf


----------



## Tony Bogs (Apr 12, 2014)

Solution for AN9067 issues:

With SiC diodes (no reverse recovery) (anti)parallel, the body diodes of the mosfets on the primary side of the 3kW LLC are bypassed, preventing high shoot-through currents in all cases, including startup.

The following points have to be addressed to get the power level above 750W:
1. PFC: the ICE2 controller power up (on/off) circuit, the software for it & desat protection.
2. LLC: SiC diodes on the primary side (LLC) (anti)parallel with the SiC mosfets 
3. PFC & LLC: auxiliary supplies & custom UVLO protection @ SiC level (all)
4. The buck stage design
4. LLC: change the rheostat mode to potmeter for better accuracy and range.
5. Software: control LLC frequency and buck stage current.


----------



## Tony Bogs (Apr 12, 2014)

The hardware modification of the PFC controller on/off is a minor change to the existing LT3082 / FOD8320 circuit. Done in a few minutes.

*PFC desat and UVLO*

These automotive grade SOT23-6 components will be used to replace the "standard" UVLO reference and comparator circuits TL431 and LM2903:
http://www.ti.com/lit/ds/symlink/tps3808g01-q1.pdf
http://www.ti.com/lit/ds/symlink/tps3700-q1.pdf
Desat detection: ACPL-332J
Driver stays the same: IXYS IXDN609

All on a daughter board on the PFC PCB.
The software and daughter board can be ready in a few days, but the delivery of the TI parts may take two or three weeks.

*LLC

*The SiC diodes on the primary side were already part of the original design, so it's just a matter of putting them back on.

'Rheostat to potmeter' : minor change. 
Protection: same daughter boards as the TI TPS 3700/3808 based PFC boards.

Auxiliary LLC supply: the RECOM RAC10/24SC is already in. Will be connected to the PFC 400V output.

*BUCK STAGE FOR 3kW

*The buck stage design and the software are going to take more time.


----------



## Tony Bogs (Apr 12, 2014)

The high power gate driver board is up and running at 200kHz. At 24Vdc it takes 0.2A when loaded with two 3.3nF caps, simulating two 28A SiC mosfets in parallel. 
The test result matches the engineering. Great.

*HF AC PREHEATING*
Thanks to GoElectric's topic "charger control lines" 
https://www.diyelectriccar.com/forums/showthread.php/charger-control-lines-167466.html
I can still take HF AC pack preheating (in winter conditions) into account in the design of the buck stage.
Main difference: negative current threshold values for the hysteretic controller, allowing current to flow back from pack to charger (buffer cap).

Image: 1us/div, 5V/div, litlle bit of overshoot. The dampening can be tweaked.


----------



## Tony Bogs (Apr 12, 2014)

Cracking on, because the 3kW has not been reached yet.
Next module, the gate driver board design with TPS3700 under* & *over voltage lockout and the other (SiC specific) features for the LLC & buck half bridges.

*Bit early maybe, QUESTION : WIRELESS INTERFACE, what to use? smartpone/ GSM/ bluetooth ...
*
Ideas, suggestions?


----------



## Tesseract (Sep 27, 2008)

Tony Bogs said:


> Solution for AN9067 issues:
> 
> With SiC diodes (no reverse recovery) (anti)parallel, the body diodes of the mosfets on the primary side of the 3kW LLC are bypassed, preventing high shoot-through currents in all cases, including startup...


Generally speaking, you don't have problems with body diode conduction in the LLC converter if the switching frequency range is above resonance and loaded Q remains above 0.9-1.0.

If you want to put faster (e.g. - SiC) diodes in antiparallel with Si MOSFETs, anyway, note that both the higher forward drop of the SiC diode as well as the stray inductance between the internal body diode and the external diode will conspire to prevent the diversion of current to the external diode.


----------



## Tony Bogs (Apr 12, 2014)

Yes, but luckily the internal body diodes of SiC mosfets have even higher forward drop voltages. 
So I don't think the inductances will come into play with my SiC mosfets.

During startup, the LLC runs at frequencies up to 600kHz. The application note describes an exceptional situation, specific for a half bridge LLC (resonant cap not charged yet), not full bridge, during startup.

Anyway, the exception had slipped my mind when I made the startup time longer AND removed the SiC diodes. Result: bang!

There is absolutely no problem for normal operation above resonance and at the right Q.

But, as I mentioned earlier, the Q factor is an issue at high loads. 
The frequency has to be kept very close to resonance (narrow bandwidth). 
So these circuits with well defined AC resistances are needed for LLC (rheostat/potmeter) frequency tuning:

Just those two circuits will do to tune all LLC circuits.


----------



## Tony Bogs (Apr 12, 2014)

*The ultra fast chargeable batteries have arrived:*
http://insideevs.com/huawei-unveils-batteries-capable-ultra-fast-charging/

First application area is the mobile phone, but the batteries are suitable for EV use.
High energy density, 0 to 50% takes 5 minutes.

Even at 44kW, it takes more than five minutes to charge a 10kWh pack to 50%.

*NEW DESIGN GOAL: 6.6 to 10kW per module

*With the new charging requirement in mind, I've decided to set a new design goal. 6.6 - 10 kW will be the new default power level per module @200 to 425Vac in, 700Vdc max out.
400Vac in is for European 3phase 22kW+ line to line.
High isolation on the outputs, module outputs can be connected in parallel up to 1414Vpeak working voltage.

Development continues @3.5kW.


----------



## Tony Bogs (Apr 12, 2014)

The tuning, desat and uvlo circuits for the LLC, all on one PCB.


----------



## Tony Bogs (Apr 12, 2014)

Sic does go bang, literally explosive, see pic.
Had to push it to really get to know the limits of SiC during LLC startup. Guess there will be more fireworks coming.

Sadly, not very soon, as there are more urgent matters that take priority.

And more pics: a rebuilt LLC power board (fresh SiC), a controller board with mods ( potmeter mode daughter board and more) and the new tune/ desat driver board.


----------



## PStechPaul (May 1, 2012)

We want videos of the fireworks! Good work on this charger.


----------



## Tony Bogs (Apr 12, 2014)

So far only firecrackers and a toaster (switch), but next time I will keep my phone in video mode when performing high power tests.


----------



## Tony Bogs (Apr 12, 2014)

Progress is slow ( SW development and more urgent matters), but here's a bit of relevant news to fill the gap.

Nissan is moving towards pulse charging (see earlier posts for more info):

http://insideevs.com/nissan-discusses-method-for-topping-off-leaf-battery/


----------



## Tony Bogs (Apr 12, 2014)

*CONTROLLER BOARD SELECTION: RASPBERRY PI2 (B)
*(with an Arduino style SW lib flavour: wiringpi, wiringpi.com)

The board has 28 GPIO lines with two SPI interfaces, one has two select lines and the other three. And UART, I2C and more.

Wiringpi supports the low cost MCP23x08/17 I2C/SPI I/O expansion devices (US$ 3), so plenty of GPIO pins.

Raspberry Pi has a great Linux / open source software base: Raspbian (debian), ubuntu and more, connectivity (BT, LAN, USB, WiFi ..) and GUI stuff.

No real time OS, but all the critical timing is done on the dedicated module boards.


----------



## bicycleguy (Aug 13, 2015)

The RPi is a great choice. However, greedily I wish you could spend your valuable time working on the analog switching power supply details that few can do rather than figuring out how to get the pi to do what you already know how to do on the Arduino.

Hope you don't do what I found myself doing with the Pi. (Even though it was fun )
1. Learning linux.(well not so fun)
2. Learning Python because nearly all the cool stuff on the pi is written in it.
3. Learning that the book I've learned from uses Python3 when 4/5 the cool stuff is written in supposedly no longer updated Python2.
4. Yesterday learning the 'module' to do neat graphs, matplotlib hasn't been ported to Python 3.2 and will require 3.5 which isn't in the easy distribution for the pi.

So in other words there is much to learn, which you may like but won't get me a SiC charger any time soon
The Teensy 3.2 would have been my 1st choice, faster development, no OS, no IOT (Internet of things) to distract and faster at 72mHz than the pi at 700mHz.

Charge ON !


----------



## eldis (Sep 3, 2013)

Hi Tony, good job with the development! No worries on the busted transistors - everyone working with these things has a solid collection of popcorn parts.
Tried to send you a PM here, but it seems you have them disabled. Can you send me a message with your email or something?
Thanks!


----------



## Tony Bogs (Apr 12, 2014)

(@bicycleguy:
No, I'm not going to use Python. And Linux and C are my favorites for development, no worries there  )

I have already ported the test Arduino test SW to the RPI. Pretty straightforward with wiringpi and SPI based I/O. First test run (SW only) went OK.

Unfortunately, there are more important matters that take priority, but I'm hopeful that I can do a full test run with all HW within a couple of weeks.

Edit: pictures of RPi SPI software test. Screen picture shows ADC values read through SPI and some lines of code. 
Other picture: test setup with RPi and control board (SiC popcorn did not damage the board)


----------



## Tony Bogs (Apr 12, 2014)

*The next prototype version is on the way.*

*(RPi) SPI:*
– To increase throughput on the SPI bus, the loose cables and flimsy connectors will be replaced with low cost flatcable parts.
The low speed (320kHz clock) LTC1598 ADCs will be replaced with smaller and cheaper 40MHz SPI clock LTC1863 ADCs. 
– SPI GPIO expander MCP23S17 will be used for digital I/O, for instance for on/off control of LLC, PFC, BUCK, precharge relay, and fault feedback. 
WiringPi supports up to eight expanders, so the maximum number of module sets will be eight. 
– The TPL0501 digital potmeter is fast enough (25MHz) and stays for LLC frequency control. 
Another TPL0501 will also be used to set the charge current in the buck output stage, all on one control board.

*Popcorn related test results:*
– Topology: Both topologies, halfbridge with SiC diodes antiparallel and full bridge (no SiC diodes), prevent high through shoot currents during startup. 
No major difference in $$, full bridge needs more drivers, half bridge more cooling. 
Half bridge does not perform well at high power levels (above ~1kW, poor efficiency, EMC), so it will be full bridge for all power levels.
– Drivers: the control boards are already adequately protected (protection diodes took the hit). 
UVLO, desat and modified reset/ restart circuits will provide additional protection 
for the SiC parts against high startup loads and fault induced stresses.

*High amp gate driver:*
The 200kHz output signal showed a little overshoot. Replacing the 3R3 gate resistor with a 6R8 creates a critically damped circuit. 
The newest ACPL 339J driver board protects the PFC SiC mosfet. 
With 10R the board is still faster than the gate output of the PFC controller.

Everything looks good, so the first high power test (~3kW) with RPi and extra SiC protection circuits is on the agenda.


----------



## Tony Bogs (Apr 12, 2014)

First power test: PFC. 
Again, with 2 230VAC heaters in series as load (750W, 1250W and 2000W selectable by switches). But this time all under full (RPi) control. 
The gate driver with protection features is clearly visible on top of the PFC module.
Borrowed from the 100kW+ SiC inverter, only one output used. 
At the bottom of the picture is the mosfet power stage that switches the load on/off.
With another SiC gate driver board (first design) driving the high side of the half bridge.

Up to 2000W all went fine. Then the PFC shut own. No 400V DC @ 3.3KW but 325V with AC line ripple (effectively just above 2kW).
The only significant difference with earlier tests is the gate driver. To be continued.

A lot of preparation was necessary. 
One example: measurement of the interrupt latency of the RPi in response to the gate driver fault signal: app. 150 microseconds,
which is well within the 1 millisecond fault hold time of the ACPL339J.

Other prep stuff: tuning board for the next test, get the LLC running at resonance.
Probably within a week, maybe two.


----------



## Tony Bogs (Apr 12, 2014)

Ok, how stupid, it's a prototype. Just checked the design paper (math done about a year ago). 
For 3.3kW two mosfets in parallel are needed.  There is only one in this prototype version. 
No wonder it turned into popcorn the first time at 3.3kW for a longer period of time. The gate driver board prevented a second serving. 
The next version (summer recess) will have two.


----------



## PStechPaul (May 1, 2012)

I'd be interested in the lower power version. I'm still planning to proceed on my tractor EV projects which can use 1.5 or 2 kVA for maximum 2 HP motors. Let me know details on how to get one of the boards and some of the components, although I may already have many of them and I can order from Mouser or other distributors. Thanks.


----------



## Tony Bogs (Apr 12, 2014)

Once I have ported the prototype versions (that is, with footprints for soldering by hand) to Kicad, I will put the gerber files online. 
With BOM etc. Free for personal use.
Here is a picture of the start: creating the necessary libraries (thank you, mr. Rohrbacher!)
Edit: And pdf files of the buck dual high side gate driver prototype board (not yet tested).


----------



## Tony Bogs (Apr 12, 2014)

The first design in Kicad: the buck stage with AC preheating. 
These papers describe the AC preheating method:
http://citeseerx.ist.psu.edu/viewdoc...=rep1&type=pdf 
http://ecec.mne.psu.edu/Pubs/ACTA 2013.pdf

Preheat power source:
When the charger is not connected to a power outlet, 
a booster (step up regulator) supplies 2x the battery voltage on the LLCOUT+ connection.


----------



## bicycleguy (Aug 13, 2015)

Saw a Digikey add for this LLC controller chip. 
https://www.fairchildsemi.com/datasheets/FA/FAN7688.pdf

The data sheet mentions some of the issues your addressing. I don't know if this might be useful but thought you'd like to see it. Lot of functions in a $3.00 part. The 'integral of the switch current' control and switching between pwm and frequency modulation depending on load seem cool. Also the non-ZCS and non-ZVS detection, (which I don't understand how they work)

Would any of this be useful to your design?


----------



## Tony Bogs (Apr 12, 2014)

Looks good. Great improvements for high power converters with low voltage output. For instance for the EV 12V system. 
So far I have used the FAN6208 for secondary SR in my frequency modulation LLC designs.


----------



## Tony Bogs (Apr 12, 2014)

The LLC is again up and running. 
Picture of the full experimental setup with a colorful Wiring (duino) style wire spaghetti. 
Zip file contains a MP4 video showing an input signal sweep of the LLC transformer (bottom trace) and the resulting DC output (top trace). 
And some HF oscillations (probably common mode issue). 2 microseconds per division.
Oddly, the DC output increases as the frequency increases towards 160kHz. Must be due to parasitic elements. The other part of the sweep is as expected.


----------



## Tony Bogs (Apr 12, 2014)

No common mode ringing, just a short in the dead time circuit and voltage too low for ZVS (30V test run).
But here it is: the clean ZVS signal as we want it, absolutely no ringing, at 300V LLC input (without PFC boost), a little bit above resonance. 100V/div, 2usec/div


----------



## Tony Bogs (Apr 12, 2014)

Just added a few pieces of 5 mil Mylar between the two halves of the LLC transformer core, thereby increasing the magnetizing current and the stored energy for ZVS. 
That solved the final startup issue: no ZVS at higher frequencies with anti-parallel SiC diodes. As can be seen in the last picture: ZVS was barely reached. 
The SiC diodes have no reverse recovery but they sure add quite a bit of capacitance. 
More reason to go with the full bridge topology.

Now, let's do some tuning and then crank up the power.


----------



## Tony Bogs (Apr 12, 2014)

More power means more cooling. Here's the cold plate for the next prototype iteration:
http://www.distrelec.ch/de/kuehlkoe...ronic-gmbh-wk85-400-anschlussteile/p/17563117

The Lem LTSR25 current sensor is cheaper (US$20) than the Honeywell CSNX25 (US$50), but based on the datasheet it does need a VREF buffer for the TPL0501 digital potmeter:
http://www.lem.com/docs/products/ltsr 25-np.pdf

The wire OCP resistors are bulky and expensive. 3W Bourns SMD resistors are next:
http://www.mouser.com/ds/2/54/ra-777404.pdf


----------



## Tony Bogs (Apr 12, 2014)

It seems that tuning works OK. The video shows the LLC switching between two load levels while decreasing the operating frequency.
In the background the cooling fans can be heard.
Upper trace: output voltage (100V/div), lower trace: mosfet output stage (50V/div), 2 microseconds/div.

A high load transient can trigger a soft overcurrent shutdown. 
This did occur during tuning at the very low end of the frequency range when the high tuning load (500W) was turned on. 
Although the LLC has an almost constant *DC* (with emphasis on DC) gain at resonance,
the [edit:] [load] step response is in the msec range with a drop in output voltage. 
A negative load step results in a boost of the output voltage that can exceed the SOA of the power devices. 
An overvoltage comparator (in SW or HW) must be used that shuts down the LLC in that case . 

The LLC transfer function shows a high frequency response with practically zero magnitude. 
[Edit:] [Everything looks good, but] the high frequency hysteretic buck stage has to be assembled first for a slow turn on of the high charger loads in the kW range.


----------



## Tony Bogs (Apr 12, 2014)

Since everything looks good, here is a reminder of the design goals:

 – Level II J1772 compliant off line charger (up to 19.2 kW)
– DC (non standard) charger (up to ~32kW) from solar battery input at home
– Modular design, 3.3kW OR 6.6kW per power stage module
– A power module consists of four stages: input (filter), boost (PFC), isolation (LLC), buck (hysteretic mode)
– Max eight modules per charger, 52kW max total (DC+AC)
– SiC design: AIR COOLED or LIGHTWEIGHT LIQUID
– Isolation stage, high frequency LLC topology: buck outputs can be connected in parallel
– Current source output with a voltage limit (in stead of voltage source with current limit)
– Hysteretic output current regulation
– CCCV, with short pauses = pulse charging
– Optional AC preheating, from EV battery input, off line, or solar battery input 
– Integrated minimal battery management (NO BALANCING ACT, PLEASE!) 

*LLC CONTROLLER

* FAN7631 out, ST L6699 in. 

http://www2.st.com/resource/en/datasheet/l6699.pdf
http://www.digikey.com/product-detai...1-1-ND/3594799 (~US$ 4) 

Relevant features:
– adaptive dead time generation
– prevention of hard switching during startup
– synchronous burst (skip) mode
– anti-capacitive-mode protection 
– adjustable startup frequency (<= 300kHz)
– delayed restart as default procedure after protection shutdown
– wide junction temperature operating range -40 to 150C
– seperate latch-mode shutdown input 

In a H bridge the tank current will be measured with a current transformer.


----------



## Kevin Sharpe (Jul 4, 2011)

Tony Bogs said:


> – Level II J1772 compliant off line charger (up to 19.2 kW)


Have you dropped three phase AC support (or was that feature wishful thinking on my part)?

In Europe high current J1772 above 32A is very rare. However, 32A three phase (22kW) and 63A three phase (43kW) using the J1772 protocol is widely supported at public charging locations


----------



## PStechPaul (May 1, 2012)

Tony, could you show the circuit or explain how you will be achieving the J1772 handshaking protocol? I am still a bit confused on how it should be implemented, and I will soon be routing and building my first prototype for the EMW charger retrofit. See my discussion about that for details.

Also, I'd be interested in obtaining one of your chargers, or even just the bare PCBs and relevant documentation. I haven't checked your website lately, so perhaps there is more info there.

Good job! Thanks.


----------



## Tony Bogs (Apr 12, 2014)

It is clear that the charger input port, handshaking and related regulation issues have not been the focus of my efforts so far. But I will certainly address them.



Kevin Sharpe said:


> Have you dropped three phase AC support (or was that feature wishful thinking on my part)?


No, 3 phase is what I will be using.



PSTechPaul said:


> I am still a bit confused on how it should be implemented, and I will soon be routing and building my first prototype for the EMW charger retrofit. See my discussion about that for details.


Great job for the EMW kit owners. And I will get back on the subject of the protocol later on. Maybe when my website goes online.

LLC power has gone up to 1kW in the heaters. 
Current transformer: I have added a winding between primary and secondary windings to divert the capacitive current from the midpoint of the HB (~4000V/usec). 
Above 1kW ground current interference becomes an issue. Also affects the SPI interface. More isolation is needed.


----------



## Tony Bogs (Apr 12, 2014)

OK, here is the trivial J1772 info that I have gathered from several sources:
1. The EV has to supply 5V for the proximity circuit. So I guess that there is a switch on the charger port that can turn an isolated power supply on/off. 
If not, it is very easy to create another solution. An interrupt line connected to a comparator in the proximity circuit is also a good idea. 
2. The EV sends info about its state to the EVSE through a resistor value. Easier than baking a pie.
3. The EVSE sends info about the maximum power level through PWM. Simple stuff. 

That's it. Just identify the few possible states and transitions. Draw a chart and then it is pretty straightforward to code it. 

All sounds very easy? If I understand correctly, that was the big idea behind J1772.


----------



## PStechPaul (May 1, 2012)

The EMW charger seems to have only a very simple and possibly incorrect J1772 connection. It has the diode as specified, but the cathode goes to a 1k resistor to GND. Across the resistor is a 10nF capacitor, and there is a 1k resistor going to the D7 digital input of the Arduino. The pilot signal from the EVSE starts as a 12V DC signal, through a 1k resistor. It expects to see a 2.74k resistor to GND on the vehicle charger, indicating that it is ready, and then I think the EVSE sends the square wave with duty cycle indicating its current capability. This also performs a diode check which fails if the negative polarity does not swing fully to -12V. At this point the EV charger should add a 1.4k resistor across the 2.74k to make 882 ohms parallel, and this signals the EVSE to send power through the mains. Perhaps 1k is close enough (13%) to that value to work, and since EMW uses 5% resistors, some may work better than others. 


























There does not seem to be any proximity circuit in the EMW charger. The resistors and the switch might be built into the connector, but since the purpose seems to be disabling the vehicle while the EVSE is connected, there must be a separate source of 5V as well as some sort of comparator located elsewhere on the vehicle to perform this function. The EVSE does not seem to monitor the proximity circuit, but it may have an interlock that senses disconnection of the pilot which will shut down the charge. Ideally, the charger (or BMS) would remove the 1.4k shunt resistor which should signal "ready" and stop the charge. 


































The EMW charger circuit shows an optional 50A diode to isolate the battery pack so that the voltage will not feed back into the capacitor banks when connected. But the two chargers I am working on do not have this installed. Thus, when the battery pack is connected to a non-powered charger, there will be a large current flow into the 2x560 uF capacitors. Also, the current will flow through the buck inductor and the body diode of the IGBT into the 15x560 uF capacitor bank. This is nearly 10,000 uF with no current limiting means.









Even with the diode, if the charger is powered when the pack is connected, the capacitor bank of two 560 uF may have a charge that is higher than the pack voltage, which could send a high current surge into the batteries.


----------



## PStechPaul (May 1, 2012)

Since we are talking about the J1772 interface, I think we should understand it and come up with a simple and reliable circuit. Here is some more explanation and some proposed solutions:

http://electronics.stackexchange.co...ilot-signal-sequencing-with-passive-circuitry

The pilot circuit is fairly straightforward, at least as far as what is required by the EVSE. The diode and 2.74k to ground is all that is needed to signal a "ready" condition. But adding the 1.4k to cause the EVSE to supply mains power requires some sort of active circuit, and there is no guarantee that the vehicle's battery pack or 12V accessory battery will be available, and the charger logic circuitry may be assumed to be unpowered.

It would be best to make sure the charger is ready for the mains power before it is applied, and that creates a chicken/egg dilemma. But we know that a functional EVSE will initially supply 12 VDC initially through the diode and its own 1k resistor, so there will be 9V peak available on the 2.74k resistor. This may start as DC but when the EVSE senses the vehicle it will produce a rectangular wave ranging from 10% (6A) to 96% (80A). This corresponds to an average DC level of 0.9V to 9V, but for most charge stations it will probably be at least 30A which is 50% and an average of 4.5V. 

The 2.74k resistor will draw 9/2.74k = 3.28 mA, so it seems safe to assume that 10% of that, or about 300 uA, could be drawn without affecting the sensed "ready" condition. Worst case of 10% duty cycle means that the continuous current draw of an active sense circuit would be limited to 30 uA, which is still enough to power a microcontroller, and it could supply a few uA for the gate of a small MOSFET which could add the 1.4k resistor which calls on the EVSE to supply mains power.

There are only a few things that might need to be determined before asking for mains power, perhaps things like temperature, ground integrity, and pack voltage. That could be read through a 100:1 resistive divider with a resistance of at least 1 megohm, or 300 uA for a 300V pack. For a 50 A-h pack, that represents a 10% loss of charge in 17,000 hours or almost two years, so, not a problem. In fact, this would also supply enough to power the microcontroller by itself. I think it's safe to assume that you would not want to charge a dead pack or even one at 50% nominal voltage, so there may be no reason to power the microcontroller from the EVSE pilot. But it could be done. 

Once the initial pilot handshaking has been done, the microcontroller can add the 1.4k resistor to turn on mains power. Until then, there is really no need for the proximity circuit, although the microcontroller could also supply the 5 VDC and monitor that voltage from the receptacle. However, the specified voltage divider is 3.3k and draws at least 1.5 mA when disconnected. Thus, it makes sense that this circuit be powered from the charger once it has been supplied with mains power.

The charger should only draw current initially to charge the main capacitor bank and the surge limiter circuit should keep this at a reasonable level. I plan to use a 22 ohm resistor which will draw about 10 amps from a 220 volt supply, until the capacitor bank has been about 90% charged. When the capacitor bank reaches about 120 VDC the 12V switching supply should turn on and power up the control and driver circuitry. It should be designed so that the PWM output is disabled until a start-up sequence has occurred. The PFC section operates independently so it will adjust the main capacitor bank to 350 VDC with inputs ranging from 90-264 VAC.

There should be no problem if the charger plug is removed before the start-up routine has completed, although if that happens while the capacitors are being charged (about 9000 * 22 * 5 = 1 second), it could still be carrying current. However, once charging has commenced, there could be as much as 60 amps flowing. So, the proximity sensor should be operational, and it can sense the nominal change from 1.5V connected to 3 volts when the button on the handle is pressed to remove the charge plug from the vehicle. This should immediately terminate the charge, and it should (or could) remove the 1.4k on the pilot circuit to signal the EVSE to remove mains power.

I hope this is correct, and perhaps make things clearer. Perhaps there should be a separate discussion of the J1772 system and its implementation.


----------



## Tony Bogs (Apr 12, 2014)

Yeah, the openEVSE info seems to be a good starting point. Their EVSE kit looks very good.

My thoughts on the "Chicken and Egg proximity circuit supply" issue: 
A 1W isolated P/S on standby draws only a few milliwatts from the battery pack. Becomes active by means of a switch on the charge port or a switch on the dashboard indicating "I want to charge".
Should not be a problem, even when the EV main battery is almost drained completely (aka "dead"). Dead for traction does not mean dead for a 1W P/S.

And thank you again, Paul, this time for finding the IR25750. 
I am going to use it for desat detection in bootstrap stages and current sensing in the next version UCC28070 based interleaved CCM PFC.

Current transformer revisited: now two chambers, the LLC is very tolerant for leakage induction on the primary side. Usually very bad in a CT, 
but in this case the low coupling of the two chamber coil former throws in an extra percentage of free "magnetically induced" windings on the secondary side, increasing the transfer ratio. See pictures. 
Apologies for the poor quality. Picture of CT signal taken at 1kW, so there is quite a bit of common mode noise, picked up by my low cost probes.


----------



## Tony Bogs (Apr 12, 2014)

*First image PFC:* Board layout for the improved PFC with UCC28070 interleaving controller (6.4” x 4.1”). http://www.ti.com/lit/ds/symlink/ucc28070.pdf

Q: Why interleaving and why now?
A: Main reason: interleaving greatly reduces the current ripple, both on the input side and on the capacitor bank side. 
At 230/ 240V AC in (level II) and 400VDC out, the PFC runs very close to the 50% duty cycle point where the input current ripple is cancelled out completely. 
Very important feature in a high power off-line charger. Two boards can be combined to create a four phase 6.6kW interleaving system. 
PSTechPaul was kind enough to start a topic about a current sensor chip that he had found: the IR 25750. 
It can replace the current transformer that TI uses in the 28070 designs. 
Current transformers work very well for AC, but for measuring a DC mosfet current in the drain line? 
The IR25750 should be much easier to use. And smaller in size, low power. The schematic is in the fourth image. 

*Second image HV BUCK (WIDE INPUT, NO ELCAPS)*:
Board layout for the VIPER26 based 10Watt wide HV input ( app. 200 to 750VDC) buck regulator (2” x 2”). 
Output: 28V nominal (at load). Linear post regulation may be necessary under certain conditions (high input voltage, very low loads). 
To be used as auxiliary power supply for PFC, LLC controllers etc...

*Third image LLC:* Board layout for experiments with the L6699 LLC controller (2” x 3”). Replaces the FAN7631.
Two boards should be in by the end of next week (no low cost “naked” proto board order for this beauty).


----------



## Tony Bogs (Apr 12, 2014)

After going through the math details, I realized that the UCC28070 PFC board should also work with 110Vac (90 to 130) input when the liquid cooling option is used. 

Because the maximum input current is higher, a few resistor values have to be changed.
And two extra resistors are needed to scale the output voltages of the IR25750 current sensor chips. 

Although it is not a design goal, it only takes a little bit of effort to make 110Vac possible. And why not add an extra connector to make synchronized operation of three boards possible (10kW)?. Yeah, sounds like a good plan.


----------



## bicycleguy (Aug 13, 2015)

Tony Bogs said:


> Since everything looks good, here is a reminder of the design goals:
> 
> .....
> – A power module consists of four stages: input (filter), boost (PFC), isolation (LLC), buck (hysteretic mode)
> ...


I've managed to get myself confused between this thread and Paul's EMW repair thread and learning about switching power supplies and this LLC version and some of the new parts mentioned.

Wonder if you could comment on any of these questions.

Will the L6699 based LLC still use the gate drivers and SPI controlled resistor you where using before? The L6699 spec says something about not changing the duty cycle, just the frequency. I thought you were changing duty cycle? Is the L6699 going to work with SiC. Seems like they might be relying on some Si mosfet properties.

Can't remember if you were planning on using the HV7800 high side current monitor chip. Regardless, can it be used on isolated outputs without further isolation?

Regarding the 120V operation. I was going to recommend dropping it until I remembered how helpful it was to test the OpenEVSE in my bedroom lab on 120V before moving the setup to the garage.

Edit add: Are the SiC gate input voltages to high for the IR25750 current sensor chips (20.8V)?

thanks


----------



## Tony Bogs (Apr 12, 2014)

bicycleguy said:


> _I've managed to get myself confused between this thread and Paul's EMW repair thread and learning about switching power supplies and this LLC version and some of the new parts mentioned.
> 
> Wonder if you could comment on any of these questions.Will the L6699 based LLC still use the gate drivers and SPI controlled resistor you where using before? The L6699 spec says something about not changing the duty cycle, just the frequency. I thought you were changing duty cycle? Is the L6699 going to work with SiC. Seems like they might be  relying on some Si mosfet properties.
> 
> ...


The 120Vac is with a big . It's all about 230/240 running at the same high amps for the 6600W that I mentioned earlier as a design goal. 
With liquid cooling. Still, 120Vac is possible. Here are the three module versions:

*Module PFC6600/240*
6600W out, 230/240 Vac in :
– 200 to 265V ac input
– T200A cores 2 mm wire 40 turns
– eight resistors with “high amp” values
– liquid cooling Austerlitz WK85
– 6 x 470uF/450V bulk output caps

*Module PFC3300/WIDE*
3300W out, wide ac input:
– 90 to 265V ac in
– T200A cores 2 mm wire 40 turns
– eight resistors with “high amp” values
– liquid cooling Austerlitz WK85
– 6 x 470uF/450V bulk output caps

*Module PFC3300/240 *
3300W out, 230/240V ac input:
– 200 to 265V ac in
– T184 cores 1,4 mm wire 40 turns
– eight resistors with “low amp” values
– liquid cooling Austerlitz WK85 or forced air cooling AAVID OS515/100
– 3 x 470uF/450V bulk output caps

Same board for all versions. Board layout has been changed. 
The bulk output caps have been moved to a separate board. A aux supply has been added.
On the board the silk layer will show the two “high /low amp” resistor values separated by a slash. 
For instance: 18K/ NP . NP means: do not populate. The first value is the high amp value. 
The big SMD section on the left can be moved to a daughter board to make factory assembly possible.

SPI resistor TI TPL0501: I will be using it to tune the LLC at resonance. 

HV8700: Maybe PSTechPaul is using it? I'm not.

Good question about the L6699 and Si parts (not SiC). Most controllers have been designed for Si voltage levels. 
Intermediate IXDN609 driver stages solve this issue. Needed anyway for the high power levels. 
Also a good point about the IR25750 maximum input volatge. The gate voltage for a SiC has to be within tight boundaries anyway, so a precise voltage regulator (LT3082, 1%) will be used for the intermediate driver stage.

Also: the math (pdf) for the slightly bigger high amp boost inductor (T200A) that is needed for the 32A versions. 

Board layout images follow (having no luck uploading images for unknown reason). Edit zip file did the trick. 
Oops, wrong image of buck controller. Correct one in hvbuckcontrol.zip. 
This daughter board for the aux supply is placed on the right hand side of the main PFC board. 
The large SMD section on the left hand side of the main PFC board can be moved to a daughter board for automated assembly.


----------



## PStechPaul (May 1, 2012)

I am using the HV7800 in my charger design, along with a 0.003 ohm sense resistor. But there are some issues. The HV7800 has a gain of 1, so for 30 amps that is 90 mV and the ADC has a 5V reference. I added a Microchip MCP6G01 selectable gain amplifier for 50x and thus 2.5 volts at 30 amps.

But there is a problem when the charger is first energized and the output has no voltage, and the current sense signal is erratic and ambiguous until there is at least 8 volts on the output. I will probably have to use the Hall device instead. It is about $9 but when the cost of the shunt resistor, HV7800, and MCP6G01 are compared, it's not much cheaper.


----------



## Tony Bogs (Apr 12, 2014)

Alright, that is very clear. 9 bucks for a Hall? That is already cheap.

Let see what the IR25750 does. Probably this weekend. I hope I can get rid of all of the ground line sense resistors.


----------



## PStechPaul (May 1, 2012)

There was also a more serious problem with the HV7800 in my application. The DC bus rails are produced by a FWB off the 120 VAC line, so the DC(-) and DC(+) both have considerable AC voltage to ground, and this causes the device to be reverse biased under some conditions. I found this when I tried to connect my scope ground lead to the AGND of the control circuitry, and tripped the GFCI that fortunately feeds my workbench. I found that it could pull about 15 mA through a 10k resistor. So the Hall sensor it will be, and I have verified that it works quite well at currents up to about 6 amps.

Here is the purchase info in case you are interested:
http://www.mouser.com/ProductDetail...=/ha2pyFaduiZOKnwDFmAPLvSEFTnb6dRhczv8Be4G70=


----------



## Tony Bogs (Apr 12, 2014)

I have been busy to get the PFC boards ready for the foundry. 
So it took a while for me to get back on the Hall sensor. Looks like it is suitable for a lot of applications at low cost. Great.

There has been a delay in the IR 25750 testing. Clearly, I have not been at my best when I designed the circuits and the PCB. 
Tracks are missing, big mistake in the UVLO/ desat comparator circuit, wrong polarity of the outputs of the optocouplers.

Retry this weekend.

Also, some of the PFC math has to be redone. The math for the bulk cap selection is in the attached pdf.


----------



## Tony Bogs (Apr 12, 2014)

The PFC main board design, 0 series. No more prototype boards.
Gerber files will be available as soon as the software, that checks the layout on the foundry website, and the PCB engineers at the foundry give the "all clear" for production. 
IMPORTANT :
1. Now with TWO mosfets per phase: *AIR COOLED @ 6.6kW or wide input 90 to 265Vac. No LIQUID COOLING necessary. *
2. *Through hole design*. SMD parts are on daughter boards.

Second image: UCC28070 SMD daughter board.


----------



## PStechPaul (May 1, 2012)

I didn't go through all the calculations, but from my experience with my DC-DC converter, it seems like it should be possible to perform the DC-DC isolated conversion with very little output capacitance or inductance, if you run the bridge at close to 100% duty cycle (actually perhaps 49% / 49%). I made a simulation of the circuit I built:










This is only 2 watts, but note that there are no high current spikes in the output capacitor, just -250 to +250 mA for an output of the same magnitude. Even with only 1 microfarad, the capacitor current is about the same, but there is about 1.2V P-P ripple on a nominal 7.5 VDC output.

So, perhaps an active PFC circuit can provide a good DC supply to a FWB circuit, which provides isolation and power transfer to the output with a DC level as determined by the turns ratio. And then the output can be a fairly simple buck current regulator for charging. 

For higher power, two FWB circuits could be paralleled and shifted in phase so that there would be complete overlap of the output square waves, and only a small capacitance would be needed on the output. Maybe you are already incorporating something like this, but I was just pleasantly surprised how well my circuit seems to work. There is really no need to regulate the voltage using PWM, and this seems to be a very simple and efficient way to achieve isolation. 

I also tried changing the inductance values for the transformer primary and secondary. With 600 uH I got 1.9W at 86% efficiency, 200 uH gave 3.86W at 82% efficiency, and 100 uH gave 4.8W at 90% efficiency. I believe this is related to the leakage inductance (coupling factor), which I have set at 0.95 for these simulations. I changed it to 0.9 with 100 uH and I got 3.49W at 81% efficiency. I had expected my leakage inductance to be fairly high because of the split bobbin, which gives high isolation. I measured 26uH leakage inductance for an open circuit value of 685uH, which is 96%.


----------



## Tony Bogs (Apr 12, 2014)

I have tried LTSPICEIV for the LT3082 LDO to examine the effect of low temperatures. I could not find a way to set the temperature at -40C.

I prefer resonant converters for high power applications. They show a higher efficiency and the always present transformer leakage inductance is a not an issue in a LLC converter.

MILESTONE: FIRST 0-SERIES BOARD

The first 0-series board: the ICE2PCS01G based PFC board. 3300W, rectified 200 to 265Vac input.
This is the board that I will be using for 10kW 3phase, Europe.
Two boards ordered. If anyone is interested in this board for experiments,
the Gerber files can be found in the attached zip file (panel layout).
I paid ~US$150 for the two, standard pooling service.
The panel break lines may cause issues with the foundry (drill holes when I ordered,
now lines in one of the gerber layer files: panelbreaklines).
Modifications:
– Two C2M008120S mosfets in parallel. each with its own driver. More evenly distributed loss.
– On board step down, wide HV input auxiliary power supply, reduces wire mess.
– 4x2 header (flatcable) can be used for the connection to the control board. SIP5 is still possible.
– OCP current sense: array of pads for parallel SMD resistors added. Wire R is still possible.
– Stacked T200A boost inductor replaces T300, saves board space.
– Through hole components are mounted on the bottom side, SMD on top, saves board space.
– 0 series design, gerber files are in an attached zip file, references and values in silk on top
– Daughter boards and main board in one panel layout, saves a few bucks.
– Resistor divider for measuring the rectified bridge voltage (at the PFC input) is on the board
– Mainly DIY sized SMD parts. Only a few smaller parts on daughter boards.
The only part that is not on the board is the screw-on NTC for measuring the cooler temperature
(actually an input for the control board: fan control/ overtemperature shutdown).

DESIGN CONSIDERATIONS WIDE INPUT STEP DOWN CONVERTER
Stability of control loops is always a high priority design consideration.
Fairchildsemi has released a paper with some SMPS practical feedback loop design considerations:
https://www.fairchildsemi.com/techni...r-Supplies.pdf
Very good 2010/2011 paper by Hangseok Choi, Ph. D.
Section V addresses the issue of the output elcap ESR zero and (in)stability.
The wide input HV step down regulator is a modified version of the ST VIPER16 evaluation kit design in the CD00222186.pdf application note:
http://www2.st.com/web/en/resource/t...CD00222186.pdf
No AC input, no electrolytic capacitors (replaced with foil and ceramic), 24V out in stead of 12V,
a Viper26HD (higher amps and frequency) in stead of a Viper16LD,
and the compensation network has been modified.


----------



## Tony Bogs (Apr 12, 2014)

And the gerber files for the 0-series PFC filter.

On the board:
- Filter chokes and caps.
- Aux supply (230/240V only): C series impedance rectifier circuit replaces Rcom RAC SMPS. 50/75mA, 24V power for the inrush / precharge relay.
- Transient OVP protection: varistors. High voltage transient rated caps.
- OCP: fuses and PTC
- Inrush (precharge) circuit with bypass relay
- bridge rectifier + cooler


----------



## Tony Bogs (Apr 12, 2014)

The BOM files for the PFCBOOST and PFCFILTER boards.


----------



## MAGNOEDU (Oct 30, 2011)

Dear Tony

this your project is very good, and what I've been trying to do, you could share your drawings with me, want to ride one for studies and learning how to work

thanks in advanced


----------



## PStechPaul (May 1, 2012)

I just received an email about an upcoming Webinar October 20 on "High efficiency resonant DC/DC converters for fast EV charger designs".

http://www.globalspec.com/events/eventdetails?eventid=1245&evtsrc=RichardsonRFPD%5F161020%5FInv1&et_rid=655074607&et_mid=83240289&cid=webinar

I was going to post it as a separate item but it seems most relevant here.


----------



## Arlo (Dec 27, 2009)

Tony how is this going? 

I am looking at making a 1 phase 110/220v AC input charger to produce 
an isolated output.

I either need to charge to 465v to charger my whole pack or 232.5v and do 1/2 the pack per charger.

I am thinking something like you have been working on. Maybe 2 3.5kw chargers in series or parallel to get ~7kw which is max for most level 2 chargers here in north america. 

Thanks.

-Arlin


----------



## Tony Bogs (Apr 12, 2014)

I'm back. Everything is looking very good. I had some more important matters that took priority.
Just finished testing the HV buck aux supply of the 3.3kW PFC 0-series board. 

Two module sets in parallel should give about 7 KW charging power @ 500V with high isolation.

I'll put the circuit diagrams online as soon as the 1-series has been fully tested.

@PSTechPaul:
Wolfspeed has released a 20kW LLC converter reference design for a charger. 
On greencarcongress.com: 


> Wolfspeed delivers industry’s first 1000V SiC MOSFET for efficient EV fast chargers


 http://www.greencarcongress.com/2016...wolfspeed.html
http://go.wolfspeed.com/referencedesigns


----------



## Tony Bogs (Apr 12, 2014)

Not fully tested yet, but here's the circuit diagram of the 7W 115kHz wide input DC/DC buck regulator with frequency jitter (EMI reduction) as used on the PFC. 100 to 500V DC in, 24V (23 to 30) out ( >25V only at no or very light load). 

At 300V in, 10W light bulb load, 20C ambient, still air, the regulator shuts down after 10 seconds (thermal overload protection). So 7W should be OK @ 400V with forced air cooling.

The daughter board has two 4 pin header connectors. I did manage to get the orientation wrong the first time, so the board started as a popcorn machine. Different headers for the next version!

http://www.st.com/resource/en/datasheet/viper26.pdf

http://www.st.com/resource/en/application_note/cd00222186.pdf

Circuit diagram PFC: basically the same as published in the Infineon application note for the ICE2 controller.

@Arlo: Very impressive controller design /build projects on endless sphere. I saw that you have tested desat in a full short. COOL!!


----------



## Arlo (Dec 27, 2009)

Tony Bogs said:


> @Arlo: Very impressive controller design /build projects on endless sphere. I saw that you have tested desat in a full short. COOL!!


Thank you.

I would love to add desaturation detection on a charger design but even the fastest drivers that include it are lucky if they can switch up to 50khz.


----------



## Tony Bogs (Apr 12, 2014)

I have tried several. The latest SiC driver board has an ACPL-339 with a built-in 1ms mute. So far no issues up to 200 kHz (with external driver mosfets of course). 
Actually, the board prevented popcorn in the PFC section of the charger @ 65kHz. Added for test purposes after a first serving.

BUT: the 339 board adds a lot of hardware, so I am not going to use it in low power applications.


----------



## Arlo (Dec 27, 2009)

Tony Bogs said:


> I have tried several. The latest SiC driver board has an ACPL-339 with a built-in 1ms mute. So far no issues up to 200 kHz (with external driver mosfets of course).
> Actually, the board prevented popcorn in the PFC section of the charger @ 65kHz. Added for test purposes after a first serving.
> 
> BUT: the 339 board adds a lot of hardware, so I am not going to use it in low power applications.


I reworked the math on the acpl-337j and it looks like a max pwm would be 333khz but thats only if the mosfet doesnt add dead time and if the gate drive doesn't over load due to mosfet gate capacity.


----------



## Tony Bogs (Apr 12, 2014)

I have tested the boards for two 300A SiC bricks in parallel. That's a pretty heavy load at higher frequencies. Not for use in the charger, but in a 100kW+ inverter. BTW, your BLDC controller looks so much easier to implement. Can it really run with only about 100 lines of C?

Another issue at high frequencies is the delay time desat detection to fault output. Often in the 10 usec range. 

Of course, it is always possible to design desat without using a highly integrated component. PSTechPaul found a suitable IR25750 sensing device for voltages up to 600V.


----------



## Arlo (Dec 27, 2009)

Tony Bogs said:


> I have tested the boards for two 300A SiC bricks in parallel. That's a pretty heavy load at higher frequencies. Not for use in the charger, but in a 100kW+ inverter. BTW, your BLDC controller looks so much easier to implement. Can it really run with only about 100 lines of C?
> 
> Another issue at high frequencies is the delay time desat detection to fault output. Often in the 10 usec range.
> 
> Of course, it is always possible to design desat without using a highly integrated component. PSTechPaul found a suitable IR25750 sensing device for voltages up to 600V.


Sorry I am not sure which controller thread you looked at... My original I did write the code but thats not what I used. I am currently using a brain chip bought from a guy who goes by lebowski on ES forums. 
He sells a brain chip with like 200 pages of assembly he writes and flashes to a dspic30f4011 and then locks so you can't see it and steal the code. But you get to use a Rs232 adapter and set it up for your project.

Can you give me links to the 300 amp sic bricks?

I am using 1MBI800U4B-1200 igbts for the final high power version but for testing and for a few controllers for friends I am using 1MBI600U4B-120 IGBTs the 800 amp igbts are rated for 1200 amps @ 25 deg C and 800 at 80 deg C the 600a IGBTs are rated for 800 amps at 25 deg C and 600 are 80 deg C I got the first 7 800a igbts and all of the 600 amp igbts for ~$30 US from a guy on ebay in germany. 

As for desat. I don't think high frequency is an issue. Up to a point. mine senses a problem and shuts it all down in 6 uS and you can design it to be a bit quicker. But even then if you have your system designed properly it will be ok. What I mean is look at what the power switch is rated for for a short pulse and make sure it is ok in a dead short at those numbers for that length of time then set the desat to trip at a current value below that short pulse rating and then if it doesn't trip then your fuse or circuit breaker something will pop anyways. But in a dead short desat acts quicker then in a pulse into an inductor. 

Sorry I didn't mean to deal rail your thread. If you want to we can continue on here or one of my controller threads on ES or I did make a controller thread on this forum. In time I will also start a charger thread on here.


----------



## Tony Bogs (Apr 12, 2014)

Arlo said:


> Sorry I am not sure which controller thread you looked at... My original I did write the code but thats not what I used. I am currently using a brain chip bought from a guy who goes by lebowski on ES forums.
> He sells a brain chip with like 200 pages of assembly he writes and flashes to a dspic30f4011 and then locks so you can't see it and steal the code. But you get to use a Rs232 adapter and set it up for your project.


That clarifies a lot. I have seen the very interesting posts by lebowski on assembler. 

The SiC 100kW project:
http://www.diyelectriccar.com/forums/showthread.php/high-power-100-kw-sic-inverter-129642.html
Now on hold. So far I have only seen one SiC inverter design (55KW). 
I am reconsidering using an earlier driver board design again with ACPL-332 and IXYS drivers.

Cree has made a seperate company Wolfspeed for its SiC power devices and sold it to Infineon. 
http://www.wolfspeed.com/cas300m12bm2

Desat has to be very fast for SiC. The math I have done shows about 1 usec max @ 350V. So it is extremely important to keep bus bar inductances low.


----------



## Tony Bogs (Apr 12, 2014)

Pictures of the assembled 0-series 3300W PFC. T184 Amidon cores, 1.4 mm wire.


----------



## Tony Bogs (Apr 12, 2014)

For those who want to build (and maybe design) their own charger, this ETH slide about unidirectional 
“Three-Phase Unity Power Factor Mains Interfaces of High Power EV Battery Charging Systems”:
http://www.pes.ee.ethz.ch/uploads/tx...harging_02.pdf

shows an overview of a classification system on slide 8. 
“Phase Modular Systems” are in the branch “Active PFC systems” directly below the root of the classification tree.
A modular, isolated topology also supports application with single phase and DC (solar) power sources.

Back to the engineering details: preparing the LLC 0-series.

Two days ago I realized how the LLC design can be simplified enough for a 0-series board after reading a topic on a DC/DC converter by PSTechPaul:

Move the operating point of the LLC to a higher frequency than resonance (load dependant) 
and use a controller with built-in startup and anti-capacitive mode protection (ST L6699). 
The trade-off is a slightly lower efficiency. 

PRO: 
– No anti-parallel SiC diodes
– No high precision ADC / controller board
– No tuning boards

*Static load*
Since the load is almost static under uC control and the buck stage handles the low frequency variations in LLC output and battery voltages in hardware, 
no fast closed loop regulation is needed. Slow uC adjustments will do. 
The buck stage input has a fixed AC resistance of -70 at maximum power output.

*Bandwidth*
The Q factor at maximum load is smaller than 4.5. The bandwidth @ 90% output voltage is at least +/- 5 kHz at a center frequency of 100 Khz (+/- 5%).
The frequency shift of the resonant tank as a result of the temperature drift of its components stays well below 5 %. 
The resonant inductor is basically an air core inductor. The main transformer inductance drift is greatly lowered by an air gap (< 2%).
It increases bandwidth and decreases gain increases, total effect close to nil. 
The polypropylene tank capacitors show a 2,5% negative drift from 25 to 100 degree C. 
The influence on the resonant frequency and Q factor is reduced to about 50% by a square root function. So total maximum drift 1,5 %. 

*Controller drift*
The frequency drift of the oscillator of the controller is much larger, but it can be compensated by the uC based on the measured LLC output voltage. 
The risk of entering the dreaded capacitive mode in steady state is eliminated because the bandwidth allows an operating frequency that is well above the resonance point. No tuning boards needed. 
Thermal drift (caused by transformer, resonant capacitor, controller) cannot bring the LLC into the danger zone.

*Half bridge startup SiC stress* 
Sometimes solutions can be very simple. And low cost. 
Since the LLC is under uC control, startup can be delayed long enough to charge the tank capacitor to the midway point using a high ohmic 1:1 resistor divider. 
Then the L6699 takes over.

*Shoot through (capacitive mode)*
Anti-parallel SiC diodes are no longer needed when the ST L6699 controller is used.
In case of a fault condition, the SiC mosfets can survive the small number of shoot through events that happen before the "anti-capacitive mode" protection of the L6699 kicks in.


----------



## Tony Bogs (Apr 12, 2014)

*HARD SWITCHING: how do the SiC mosfets survive?*

Although hard switching only occurs in case of a fault condition and not during normal operation, 
two precautionary design alterations ensure that the SiC mosfets can survive a small number of hard switching cycles:
1. A -7.5V gate off voltage should prevent mosfet turn-on due to a high dV/dt capacitive feedback from drain to gate. 
Micropower SOT23-5 LT1617-1 DC/DC converters with hysteretic control will be added to the HB bootstrap circuits. 
http://www.linear.com/docs/3201
2. A turn-on gate resistor with a high value (22R) should prevent shoot-through currents that exceed the 80A SOA limit. 
Turn-on is slower than reverse recovery of the body diode of the opposite mosfet in the half bridge. 
The high value does not have a significant adverse effect on ZVS turn-on during normal operation (slightly increased loss).

Thermal stress is limited by the small number of hard switching cycles (L6699 protection circuit). 

*LLC CURRENT SENSING

* The capacitive sensing method has the lowest loss. 
A small capacitor in parallel with one of the tank capacitors that is connected to ground diverts a fixed percentage of the tank current to a tiny Epcos current transformer.
https://en.tdk.eu/inf/85/ds/b82801b.pdf 

*uC FREQ ADJUSTMENT

* The 1.4 MHz SPI DAC LTC1257 http://www.linear.com/docs/3414 can operate from the L6699 15V supply voltage and it has a reference voltage that matches the voltage used by the L6699 oscillator. 
Although it is more expensive than the TPL0501 circuit, it only requires two additional parts, 1 capacitor and 1 resistor, for a complete T6699 interface circuit.


The big parts still fit on the 10x16 cm board, both sides used. See image.


----------



## Tony Bogs (Apr 12, 2014)

OK, all ready to try out the new stuff. 

First up is the PFC. With two hard switching mosfets in parallel the board should pump out 3600W. 
Heat that is, and it is not going to be wasted. Forecasts say there is a cold week ahead. 
I think I can have the board running within a day or two. A modification of the Pi on/off interface is needed.

Before that the new LLC parts have to be ordered: EPCOS CT, LTC1257 DAC ..
Delivery can take up to 4 days. Then a few days of soldering and programming.


----------



## Tony Bogs (Apr 12, 2014)

The LLC parts have been ordered. Production of the "engineering" copper only PCBs for the LT1257 and LT1617 circuits takes seven days.
*
UPDATE 0 SERIES FILTER BOARD*

The PCB foundry (high quality production in EU) informed me that there are manufacturing issues with the FILTER panel. It can not be produced as a panel. 
So the PCBs for the FILTER section of the 0-series will be ordered as seperate BARE PROTO PCBs (no soldermask / silk). 

*SMD CIRCUITS*

An increasing number of PCB foundries are offering PCB assembly. 
From now on all SMD parts will be placed on daughter boards with PCB assembly in mind.

*FIRST MODIFICATION PFC 0 series*

The two mosfets in parallel will be driven by one IXYS 609. Besides reducing the part count, this mod also spreads the losses more evenly. Based on the 
Cree Silicon Carbide Power White Paper:
Dynamic and Static Behavior of Packaged Silicon
Carbide MOSFETs in Paralleled Applications

The value of the gate resistors can remain unchanged: 2R2. The mosfets have a 5R internal gate resistor.


----------



## Tony Bogs (Apr 12, 2014)

The new PFC 0 series board cranks up the voltage to 400V.
First try with a 25W load .

Stable response to turn-on, no overshoot, no oscillations. Sluggish, it takes about a second to get from 300V to 400V, exactly as expected.


----------



## Tony Bogs (Apr 12, 2014)

No sugar coating: one mosfet (two in parallel) blew up at only 25W load about 30 seconds after reaching 400V output voltage. 
The other one survived the event. 

Also no reason for alarm, paralleling SiC is new, even for Cree (now Infineon / Wolfspeed). 
At the end of the white paper on the subject, the authors note that not all aspects have been investigated. 

So what went wrong? 

All design recommendations were implemented. 
Driver very close to the mosfets, symmetry in board layout, single driver (last minute alteration), gate resistors with low values, etcetera.
The load is very low, so it is very unlikely that the cause can be found there.
Maybe my focus has been too much on the the paralleling issue. 
So my first modification is a higher value for the gate resistor(s). 

On the up side, no damage done to the rest of the board .
The board is functional again with one mosfet and a 4R7 gate resistor.


----------



## piotrsko (Dec 9, 2007)

Otmar has a real time matching process for his mosfets in the zilla. Apparently they dont play well in parallel.


----------



## Tony Bogs (Apr 12, 2014)

Does not surprise me when it concerns 1000A or so. 

What I have discovered so far for my 32A PFC:

The white paper discusses the use of parallel SiC mosfets in a sepic converter @ 600V, not a PFC @ 400V. 
Main differences: voltage and a schottky diode. 

So the reasoning for hard switching in the LLC half bridge also goes for the PFC, 
but with the body diode replaced with a schottky (much lower reverse charge) and an extra mosfet. 
Now the math has to be done for the turn-on gate resistor. The value for turn-off does not change. 

I also noticed the the retaining clip on the cooler does not apply pressure at the position of the mosfet die. 
And the mosfet does not fit snugly against the cooler. 
The design is for a Fischer SK481 cooler, but I have used an AAVID OS515.
I will order the SK481.


----------



## Tony Bogs (Apr 12, 2014)

I have done the math based on a maximum amps of 41 (per mosfet) for a full reverse recovery of the schottky: turn-on gate resistance 4R4. 
Then the drain current increases by about another 30A to discharge the mosfet output capacitances. 
That is a total of 71A per mosfet. Very close to the 80A SOA limit. 
So 10R is a safe value when 20% difference in drain current and 20% variation in the key parameters are taken into account: 
transconductance, output capacitance, drain voltage and diode charge.


----------



## Tony Bogs (Apr 12, 2014)

Two mosfets, now with 10R on and 10R||3R3 off values for gate resistors, are back with a 25W load.

Load does not have a big impact on the thermal stress of the mosfets. 
Hard switching and a high frequency (130kHz) dominate the loss. 
Even at light load the switching loss is about 25W in each mosfet. 
It increases to 36W at maximum load. Conduction loss is much lower: only 6W per mosfet at maximum load.
Isolation pad and TO-247 package have a combined thermal resistance of 1K/W. 
The cooler adds another 0.3 to 1 K/W (dependent on air flow). 

So a 25W light bulb is a good starting point. 
Let it run for a while and then increase the load step by step to 3000W (two 230V/2kW heaters in series).

*INPUT FILTER

*I am going to add a common mode choke to the filter.


----------



## Tony Bogs (Apr 12, 2014)

All went well for about 90 minutes until 400VDC became too much for the 230VAC/25W light bulb. 

Apparently it caused a short circuit in the Si 600V mosfet half bridge that I use to turn the load for the PFC. 
A few copper tracks in drain to source path in the low side of the HB were vaporized. 

Unfortunately, it also blew up one of the SiC mosfets in the PFC. 

So I reread the section of the PFC data sheet about short circuit protection and it turns out that the short circuit current can be much higher than the current at maximum load before the PFC shuts down. Not good!


----------



## Tony Bogs (Apr 12, 2014)

Pictures of the damage.

The PFC can not be protected against a full short. In this case all SiC parts had to be replaced. 

I am going to replace the lower Si mosfet of the half bridge that turns the load on/off with a diode. No more HB full shorts. 

And of course, the gate resistors. The high over-current limit (60 to 64A) in the data sheet of the PFC controller.
New values: Ron = 15R and Roff = 0R

Next attempt to reach 3000W is tomorrow.


----------



## PStechPaul (May 1, 2012)

Good luck on the retry. I found an interesting article on SiC, although it's 5 years old. Might be helpful for those who have not worked with SiC devices:

http://spectrum.ieee.org/semiconductors/materials/silicon-carbide-smaller-faster-tougher/0

Something else to consider, if the failures occur at higher voltages, is that you might be able to use two lower voltage units in series. And since the output voltage for a charger has a limited range, perhaps 300-400 volts for a given battery pack, you could use a fixed 300 volt supply and a separate current-regulated supply handling a maximum of 100 volts.


----------



## Tony Bogs (Apr 12, 2014)

Very good article, Paul. Very readable. Not too much tech talk.

About the latest mishap. Actually, it was a *Si* mosfet in the HB load switch that bit me in the rear quarters. 
Low side FET did not have a negative gate off voltage. 
I guess high dV/dt ringing (caused by light bulb failure) was fed back through the drain-source capacitance, resulting in both FETs on: catastrophic short. 

It is just one of those things that happen. Si HB was there so I used it. Not the best choice as it turns out. Should have replaced the low fet with a diode right away.

But the damaged parts have been replaced. The PFC is ready for the 3kW test.

And yeah, all this is necessary to get to know the details of SiC at high voltages in practice before moving on to higher power levels.


----------



## Tony Bogs (Apr 12, 2014)

Good news. The PFC cranked out ~1000W without issues. For higher loads some programming has to be done. Here's why.

The HB (now hi side Si Fet IXYS IXFH44/800V + lo side SiC diode ST STPS1206) turns the ~1000W resistive load on very rapidly. 
The PFC with its very narrow bandwidth can not keep up. So the output voltage first drops to ~300V before it crawls back to 400V.
It shows a stable response to the huge load steps. Turn off increased the PFC output voltage until the over-voltage protection kicked in at about 425V. 

Such a huge resistive load step is not something the PFC has to deal with in the charger. 
A 1650W load step was too much. The over-current protection kicked in repeatedly. 

So: for the next load levels (up to 3000W resistive load) I am going to write a small WIRINGPI program that uses the PWM library to increase the load very slowly in 50W steps.

*SHORT CIRCUIT PROTECTION*

During these tests the standalone PFC is protected against overload but not against a full short. Clearly demonstrated by the latest mishap. 
Once part of the charger the LLC and the buck stage protect the PFC (and all other circuits) against a short at the charger output. 

*LLC*

The PCB foundry shipped the five LT1617/LTC1257 boards last Friday. 

The TI LM3485 PFET hysteretic buck regulator will be used to provide 15V for the L6699 and LT1617.
LM3485 WEBENCH figures (20 to 32V in, 0.2A, 15V out) at:
http://www.ti.com/product/LM3485?keyMatch=lm3485mmx/nopb&tisearch=Search-EN-Everything
show footprint=278 mm2, BOM cost = $1.42, and a 86.3% efficiency.


----------



## Tony Bogs (Apr 12, 2014)

Tried all loads with slow turn-on. The sound of the magnetostriction in the PFC inductor is so much better than the popping of SiC.

Seems that the issue of the parallel use of the SiC mosfets has been sorted.

But now there is another issue. At 3000W load the voltage decreases from 400V to 300V as the load PWM duty cycle increases from 10 to 90%.

First thought: Must be regulation.


----------



## Tony Bogs (Apr 12, 2014)

First step: I replaced the controller IC and current sense chip resistors. 
They could be affected by the short circuit mishap. 
Then I measured rectified mains input voltage and inductor current.
Up to 1650W operation is as expected, output voltage is regulated. 
At higher power output the ripple current in the PFC inductor increases and the peak values enter the Soft Over Current region. 

Now I have been using some left over parts. Also for the PFC inductor. 
Two smaller T184 cores with less turns. It seems that the inductance value is too low.
Increasing the over-current threshold is not an option, so I ordered the T200A cores and wire. 
Should be in today with the parts and boards for the LLC.


----------



## PStechPaul (May 1, 2012)

I looked up the T-200A cores, and it appears that they are rated at about 1.5 kW for two pieces in mix 2 for 2-30 MHz:

http://palomar-engineers.com/iron-powder-cores-2

I didn't find the T184 but they are probably about 1200-1300 W. It seems you are trying to get 4000 watts in the PFC secton. I realize that the boost converter actually only adds enough power to boost from the nominal 220 VAC at 20 amps or 4400 watts, but it must transfer considerable energy during the times where input sine wave is below the nominal 300 VDC at 15 amps. (I'm making assumptions here). But I think the PFC inductor may need to handle over 2000 VA, and possibly peak voltages and currents beyond the saturation of the core.

I may very well be wrong, but I'm trying to figure out just how your PFC circuit works. It would help greatly to see some waveforms of the current and voltage at various points.


----------



## Tony Bogs (Apr 12, 2014)

Mix 26 is the one for power chokes.
Saturation of the choke at high power levels is just what the doctor ordered for a PFC.
As described in this Infineon application note on pages 8 and 9:
http://www.infineon.com/dgdl/Infine...N.pdf?fileId=5546d4624a56eed8014a62c75a923b05

PFC boosters try to get the line current in sync (no phase shift) with the 50/60 Hz line voltage with as little sine wave distortion as possible. 
So the current waveform looks like a sine with the PWM ripple superimposed. I just saw the waveform on the scope. 
Much lower PWM ripple now with the T200A cores (56 turns 1.4mm CuL). 20A peak for the base 50Hz. Equals ~3200W @230V in. 
The output capacitors have to deliver the energy during the low voltage periods of the line input.
Of course, at high power output they are not able to maintain the ~400V. There is an output ripple @line frequency (about 10 to 20V). 
This ripple value is the main design parameter for the calculation of the output capacitance.

Now that 3kW has been reached with increased SiC current, the sound of popcorn is back. The gate Ron value must be higher. 
The Cree paper on the subject shows that C2M mosfets can be used in parallel with gate resistors up to 41 Ohm.

I will post pictures of the waveforms on a scope.


----------



## PStechPaul (May 1, 2012)

I don't pretend to understand a whole lot of the explanation in the Infineon AN, but I wonder if there could be a problem with remanent magnetism in the inductor(s). From my experience with 60 Hz high power transformers driving mostly inductive loads (circuit breakers) at current limits of 15x nominal levels, I have seen (and heard) "popcorn" when the transformer is first energized. This occurs mostly when the current has suddenly stopped flowing (as when the breaker opens), or if the waveform consists of a net DC component (as happens with pulses of 4.5 cycles rather than a full 5.0).

What happens is that the core becomes magnetized in the direction of the last applied current. If the transformer is energized again in the same polarity, it quickly saturates and causes the characteristic "bong" or "ping" sound which is mechanically produced when the input wiring carries tens of thousands of amperes and the conductors try to separate and hit the walls of the conduit or other restriction. 

Something similar might happen in a boost converter if the current in the inductor does not dissipate its energy when power is removed or when load changes suddenly (as when the load lamps fused open). This may explain why a "popcorn" event might predict a more catastrophic occurrence next time operation resumes. One possible remedy might be an additional non-saturable air-core inductor in series to limit the surge to a more reasonable magnitude.

Something else I noticed in some of your switching waveforms, perhaps those of the half-bridge or full-bridge, is that there is no discernible dead time between transitions. At 100 kHz, the transition time appears to be less than a visible 1%, which would be 100 nSec. I would feel more comfortable seeing a little bit of intentional dead-time. I see that you may be adjusting dead time by selection of gate resistors and gate charge and Miller plateau, but these may have variations that could cause shoot-thru.


----------



## Tony Bogs (Apr 12, 2014)

The Infineon app note is all about PFC design. Including the boost inductor.
The sound in the PFC inductor is the result of magnetostriction. Completely normal in a PFC.
But the T184 cores were a bit too loud. 
No, the popcorn sound was made by the mosfets cracking their cases. I have already replaced them (once again). 

Deadtime: Must have been the ZVS transition you have seen. Or tests with ZVS. Maybe you want to give it a try. 
The actual programmed dead time (gate drive) is longer than the ZVS rail to rail voltage transition at the drain. 
The dead time can not be set too long, since the voltage at the midpoint of the half bridge will start to swing back and then ZVS is lost.

OK, the boards for the LT1617 DC/DC voltage inverter and LTC1257 DAC are in.
So far I have driven the mosfets with 0 to 20V. Cree recommends -5 to 20V. 

Edit gate resistor: Actually, I have increased the gate resistor to reduce the high, sometimes called shoot-through, current that normally occurs in a hard switching scenario.
The current spike can be seen in the images in the Cree paper (on paralleling) at mosfet turn-on. Spike is halved when the resistor value is increased 8X.
I have reviewed the math for the gate resistor and 15R should be enough to keep the current per mosfet below the 80A limit for safe operation. 
Nonetheless, I will increase it to 33R. 
Bit of embarrassment, all the recommendations for paralleling were followed, but not the basic -5 to 20V gate drive. So in with a LT1617 board for -5V.


----------



## PStechPaul (May 1, 2012)

I am trying to understand a bit more of the theory of ZVS and ZCS, as it applies to your design. I may be confused by the two different sections: the PFC boost, and the half-bridge or full-bridge isolated output stage. I found a few references on ZVS and ZCS and LLC that seem to help a bit:

http://www.digikey.com/en/articles/...hing-and-its-importance-to-voltage-regulation

http://www.infineon.com/cms/en/prod...html?channel=db3a3043337a914d01337e82a5392f8e

The second reference is mostly about an improved version of an Infineon MOSFET, but most helpful might be the simple schematic:










It also shows the lower overshoot and ringing due to the fast integrated body diode:









The first article appears to be more focused on an actual ZVS buck converter design (as opposed to a boost converter as needed for PFC). It explains the sequence of operations for three main components: the high and low half-bridge drivers, and the clamp switch across the inductor.










Apparently there is a short time where the energy in the inductor resonates so that the high and low switches can turn on when the voltage (ZVS) or current (ZCS) is minimum:


----------



## Tony Bogs (Apr 12, 2014)

Exactly. 

The PFC stage in the first image is always hard switching, but there isn't a body diode involved (as in image 2). The diode is a SiC schottky 

I expect no ringing at mosfet turn-on (really soft turn-on 33R) but there may be some ringing at very hard turn-off (external gate 0R, 5R internal)

Body diodes will be used in the LLC DC/DC stage, but they won't be hard commutated at all during normal operation. 
The magnetizing energy in the transformer in the DC/DC stage (first image) is used for ZVS. Capacitor in series with the primary winding of course (LLC). 

Third and fourth image:
A lot of controllers (for instance flyback) make use of the shown valley points to reduce loss. 
If ZVS is not possible, it is still more efficient to switch 25 to 30% of the supply voltage than 100%.

The simulation in LTSPICEIV of the LT1617 inverting regulator for the -5V , slow turn-on 20V input (100ms), output voltage and schematic shown, Vout is a little lower than -5V with 68K/22K.


----------



## Tony Bogs (Apr 12, 2014)

And the 20V in / -5V out LT1617-1 circuit also works in the real world. 
Just soldered one of the little combined LTC1257/LT1617 boards in the picture. 
75mV output ripple @ 10mA, 1.4MHz in burst mode.


----------



## Tony Bogs (Apr 12, 2014)

*FIRST OF ALL: THE LT1617 SCHEMATIC IN LTSPICEIV IS FOR SIMULATION ONLY!*

The simulation runs fine with 20V at the VIN and SHDN pins, but the datasheet specifies an absolute maximum of 15V! 
I used a simple resistor - 10V zener - capacitor stabilizer for VIN and SHDN in the real world. 

Back to tech talk, you may want to skip this:

*SiC “ZVS” IN THE PFC*

These properties are used at turn-off of the mosfets in both LLC and PFC:
1. SiC devices have non linear capacitances (Coss for mosfets). Migh higher values at low voltage.
2. SiC mosfets are extremely fast switchers. Channel closed in about 10 nsec (@ constant drain – source voltage = no Miller effect)
3. SiC diodes have a “high” forward dynamic (AC) resistance.

The mosfet channel is turned off extremely fast (very low gate R). 
Faster than Coss with its high value can be charged to “Miller” voltages. 
Effectively, total turn-off occurs at a very low drain – source voltage. One could call it ZVS. 

So what about EMI in the PFC when the SiC schottky starts to conduct? 
Basically, same reasoning. As soon as the voltage across the diode starts to reach a value below say 10V, there is a strong increase in capacitance. 
The Q factor drops (approximately 100nH / 500pF series) and the diode turns on with a low dV/dt. The “high” AC forward resistance of the diode dampens ringing. 
Based on earlier scope measurements, I expect to see very clean voltage swings at the mosfets- diode- inductor junction.


----------



## Tony Bogs (Apr 12, 2014)

The first scope pictures. At 25W, the "gold" colored power R in first picture of the test setup.
With the -5V DC/DC regulator in front of the cooler, clips and SiC parts.

Gate voltages: 5V/div, 0V at 2 div from bottom, 100ns/div 

At turn-off (2nd picture) the voltage at the gate shoots through to ~ -9V (threshold protection zener). 
Clean signal. No ringing. No Miller plateau (ZVS ).

At turn-on (3rd) it is hard to get a good trigger point for delayed timing on an old analog scope. 
But clearly visible, very soft turn-on and Miller effect. 

Voltage at junction diode - mosfets - inductor: 100V / div, 1usec / div, 0V at 2 div from bottom.


----------



## Tony Bogs (Apr 12, 2014)

I have done the checks and double checks. 
There was a resistor with a wrong value in the LDO on/off circuit. 
So the gate drive on voltage was a bit low when the mosfets cracked thier cases: 16V in stead of 20V. 
All OK now. The scope images are there to show it.

Turn on and off at the diode - mosfets – inductor juction: 100V/div, 100ns/div, 0V at 2div from bottom (first two pictures). Very clean.

Last picture: bridge output voltage 100V /div and current (measured at 20mOhm sense resistor) 0.1V/div. V and I in sync @ 1650W output. 0V at center. 

At higher power output, the soft over current protection kicks in early (around 2000W).


----------



## Tony Bogs (Apr 12, 2014)

Increasing the over-current threshold is not an option. The mosfets would operate outside the SOA.

So the conclusions are:
- 1750W (measured output power) has been reached with T200A cores, so the topology will be changed to dual totempole, each pole with a stacked T200A inductor, one mosfet and one leg of a dual SiC diode.
- two advanced Si mosfets will replace the SiC mosfets for hard switching in a PFC: Fairchild FCH104N60F SuperFet II.

The design will be a compromise. Not specifically designed for optimum cost, efficiency etcetera.


----------



## Tony Bogs (Apr 12, 2014)

Less SiC, more Si, lower efficiency but also lower cost.

*110V/115V*
The totempole topology is now an option for 110/115V input (2 PFC boards, 2 toroids stacks on board, 2 off board). Minor board redesign.
Means less ripple when the amps skyrocket. And that is a lot easier on the input filter. 

Parts have been ordered, the LDO output voltage has to be changed to 12V gate drive level, -5V stays, 
increase the over-current threshold (rock solid superFET 110A SOA), 
back to a single gate R (2R2, huge Ciss, Miller) per FCH104N60.
And change the gate TVS diode. That is about it for 3500W on Thursday.

A 12V LM3485 board is going to replace the precision LDO. Layout is ready.


----------



## Tony Bogs (Apr 12, 2014)

The LM3485 hysteretic buck DC/DC works and supplies the 12V for the Fairchild super junction fets.
The 0-series PFC board is good enough for my purposes now, but interleaving in a totempole (stacked) topology offers more flexibility. 
And of course, a reduction of ripple currents, which means: less capacitors and a smaller input filter.
I have to redesign the board anyway, so I am going for interleaving.
*
TOPOLOGY OF A MODULAR INTERLEAVING PFC TOTEMPOLE*
Interleaving works with phases, parallel boost branches at the PFC input, that are driven out of sync, i.e. with a phase shift, hence the name.
A PFC board will have two phases, since ripple reduction works best with a number of phases that is a power of two. So 2, 4, 8 phases. 
A phase has a fixed amp rating (12Arms). Maximum power depends on the number of boards and the input voltage. 
A maximum of four boards means 96Arms in total, which equates to 7200W @ low line 110/115Vac (75Vac). 
Enough for the 6600W maximum output power per module set.
The low amps per board allow the use of fast-on connectors.

*SUPER JUNCTION FET (PFC DESIGN GUIDE)*
There is an interesting bit of information about super junction fets in this design guide http://www.infineon.com/dgdl/Infineo...4a62c75a923b05
for a single phase PFC with an output rating of 1200W.
On page 12 just below equation 22: *super junction Si mosfets may also have “ZVS” turn-off *with fast drive.

It seems that the achilles heel of the C2M0080120D mosfet is safe operation at high peak amps and high voltage. 
Here is what can be found in the specs when a comparison is made with the Fairchildsemi FCH104N60 :
The SOA graph in figure 10 of the FCH104N60 datasheet shows that it can withstand a 10usec *110A* pulse @ Tc=25C, Tj=150C and Vds<= 550V. 
In comparison, @ 450V (absolute minimum for PFC) C2M0080120D SOA: *30A*, 10usec @ Tc=25C, Tj=150C.

*CONTROLLER FOR INTERLEAVING*
I tried a TI interleaving controller and I didn't like it. It had too many design issues with a higher number of phases.
I do like the Infineon ICE2 controller and although it has a single output, it runs at a fixed frequency, so delay lines can be used to generate phase shift and those are still in full production.
The quick, easy and reliable solution: a cascade of all silicon 500nsec Maxim DS1100Z SOIC8.
The tap points at every 100 nsec allow application with 2, 4 and 8 phase interleaving.
https://datasheets.maximintegrated.com/en/ds/DS1100.pdf

*CURRENT SENSING*
The ICE2 needs a negative voltage at the current sense input for regulation and soft over-current.
A single LEM HTFS current transformer is more efficient than ground line resistors and probably also less expensive.

*PEAK OVERCURRENT / LOW VOLT*
For cycle by cycle phase peak over-current detection (desat) and UVLO (low volt) shutdown the ACPL-332J will be used for driving the Fairchild SuperfetII.

*OVERVOLTAGE PROTECTION*
Over-voltage at the output (caps) of a dual phase board is detected by a cheap and reliable LM211 comparator.


----------



## Tony Bogs (Apr 12, 2014)

Interleaving approach from a DSP angle:

http://www.microchip.com/stellent/groups/SiteComm_sg/documents/DeviceDoc/en548529.pdf

http://ww1.microchip.com/downloads/en/AppNotes/01278A.pdf

The interleaved PFC topology with an eight pin ICE2 and a cascade of delay lines is not only quick, easy and reliable, but is also does allow the eventual application of a DSP.

But for now, the focus is on getting the complete chain (0-series) filter + boost (PFC) + isolation (LLC) + powerbuck up and running @ 3300W (10kW 3phase), 230/240Vac in.


----------



## Tony Bogs (Apr 12, 2014)

AC preheating only takes an extra SiC diode and an igbt (mosfet) in the output stages of a modular charger:


----------



## Tony Bogs (Apr 12, 2014)

*PFC 0-SERIES 3500W UPDATE*

I have assembled a second PFC 0-series board. 

The 3" diameter inductor with 2mm CuL winding is back. Low loss, low ripple current. The T200A stack works well for interleaving up to 1750W per phase.

In the Infineon design guide that I posted earlier a single 45 mOhm, 46A mosfet is used in a 1200W CCM PFC. 
So for the 3500W 0-series PFC I have selected two Fairchildsemi 28 mOhm, 76A superfets to be driven in parallel: FCH76N60N. 
The mosfets have an estimated three week lead time.

Next on the agenda are low power (3x 18650 cell) test runs:
- L6699 LCC 
- buck output stage 
- 18650 cell comparison: AC preheating vs. conventional heating


----------



## Tony Bogs (Apr 12, 2014)

*AC preheating review*

In this thread https://www.diyelectriccar.com/forums...ce-179169.html I came up with a the idea of a resonant circuit for AC preheating. 
I really like it. Even better than the boost inverter. 

It does not need any modifications of modules, so from a modular design angle it is the better option. 
It is also much easier to retrofit, simple to control (Attiny85) and it has a very high efficiency. 
Because it does not need existing charger hardware, I am considering starting a new thread for the design.

It does have high voltage components in it, but they are easy to get.


The igbt in series with the inductor stays on during the entire pre-heating process, 
but it has to be rated for high amps, high voltage (1700V) and unclamped inductive switching. 
It may be possible to replace it with a short if the circuit is part of the charger. 
Probably a low Vce,sat XPT (soft punch through) type. 

The igbt in parallel with the stays on for short periods of time (~ 100 microseconds) to increase the energy in the inductor. 
It has ZVS switching with an exception at startup when the top igbt is replaced by a short. 
Short circuit rated NPT (non punch through) type protected by an avalanche rated mosfet in parallel. 

*PFC MICROCONTROLLER

*The availability of lots of shields and free libraries was the main reason for selecting an ATmega328P as the microprocessor for the interleaved PFC. 
It does not have the computing power and peripherals for full control, so the ICE2 stays. 
The 328P configures the analog ICE2 and the branches (phases ) with SPI rheostats (TPL0501). 
Phase current sensing will be done with the IR25750 and the ADC of the 328P. 

*INTER-MODULE COMMUNICATION

*All communication between modules will take place via a common high speed CAN bus. 
The charger there are a lot of possible sources of interference, so CRC is a necessity. 
For isolation TI ISO1050 can bus interfaces have been selected.


----------



## Tony Bogs (Apr 12, 2014)

*Resonant pre-heating

*The part ids for the resonant AC pre-heating circuit have been filled in. All off-the-shelf parts, including the inductors.
No top IGBT, but an IXYS 2500V IGBT in parallel with the resonant capacitor, that has "capacitor discharge" listed as application. 
A 16 or 26A 1200V avalanche rated IXYS mosfet provides protection during the first cycles in case more energy has to be stored in the inductor than is needed for maintaining resonance (also against negative Vce, intrinsic diode).
In simulations it works just fine, but it is also pretty simple to test, because it is a light DC load in a test setup with a DC power supply with a very low internal resistance. 

The LM211 over voltage protection circuit for interleaving PFC phases works.


----------



## Tony Bogs (Apr 12, 2014)

The PCB layout for the AC resonant 50 to 55Arms battery pre-heater.


On the left is the 59Arms LEM Hall sensor, on top are the resonant MKP10 0.47uF capacitors, in the center the power devices. 
Daughter boards: 
- fuse/input flter (for HV buck) 
- HV buck 15V out
- LM 3485 buck 15V to 7.5V
- MICRO control board (for now with a Atmega32U4 +++uino MICRO)

Prototype/engineering edition: no silk/soldermask


----------



## carlos_ramos (Dec 14, 2016)

Awesome project you have here Tony Bogs!

I have a few questions:

1) How are you planning to implement CC/CV charging on this charger?

Are you going to use a Buck converter stage using a double control loop (voltage and current control)?

something like this?









2) Are you planning on something else?

Thanks!


----------



## Tony Bogs (Apr 12, 2014)

Thank you, Ramos, also for asking about CCCV.



> 1) How are you planning to implement CC/CV charging on this charger?
> 
> Are you going to use a Buck converter stage using a double control loop (voltage and current control)?
> 
> ...


It is 2). Although 1) can also be very good, I prefer another method: hysteretic control in hardware, that is monitored, set and adjusted by a microcontroller.

With hysteretic control a set limit is not only a very exact, but also an absolute HARD limit. 
Hysteretic does not have overshoot, undershoot, oscillations or instability issues.

Most power supplies are voltage sources with a current limit.
But in this charger, CCCV is implemented as a current source, limited by voltage. 
Controlled by a hardware hysteretic regulator. Both limits will be hard wired by means of comparators in the buck stage.
There is a small hysteretic current ripple superimposed on the CC DC level. 
As soon as the voltage limit is reached, the microcontroller lowers the value of the DAC (8 to 12 bits, to be determined), that sets the current level.
But only if it is necessary to maintain good hysteretic regulation, for instance to prevent a high ripple current or a very high switching frequency.

This proces is part of a task that will be executed at regular clock interval ticks, probably every 10 to 100 msec. Battery charging is a slow proces.

Almost forgot: the V/I characteristic can be programmed, probably via CANBUS.


----------



## carlos_ramos (Dec 14, 2016)

Thanks for the reply Tony,

Do you have a reference (papers, books or anything) to learn about CC/CV hysteresis charging and how to implement it?


----------



## Tony Bogs (Apr 12, 2014)

No, not specifically for charging, neither hysteretic nor GH(s) feedback. 
Any suggestions for GH(s), specifically for charging?

But if you want to know more about hysteretic control, may I suggest one of the sites of suppliers of control ics.

I prefer pulse charging over CCCV.


----------



## Tony Bogs (Apr 12, 2014)

The schematic of the prototype of the AC resonant pre-heating circuit:

Diode Dres makes it possible that the tank voltage (at junction Dres - Lres- Cres) swings below the negative potential of the battery. 

A Spice simulation of a model show that the circuit injects 20Arms @ 3.3kHz when the tank voltage swings from -50V to 850V. 

The Fastron inductor is a so-called swinging inductor. 
At low currents the inductance is several times higher than at high currents. 
This increases the oscillation frequency, which partially compensates the effect of higher voltages on core loss.

When the factory 1.4mm is replaced with 2mm or multiple strands, 50 to 55Arms can be achieved with the same core size if the tank is excited to higher voltage swings.
The maximum voltage is limited by the avalanche voltage of mosfet Qprot. 
Avalanching is detected by the microcontroller through TVS diode TVSovpdet.

During normal operation IGBT Qexc is turned on close to zero crossing of the tank voltage. The IGBT is turned off when the output of the LEM current sensor indicates that the desired inductor current has been reached.


----------



## carlos_ramos (Dec 14, 2016)

Tony Bogs said:


> No, not specifically for charging, neither hysteretic nor GH(s) feedback.
> Any suggestions for GH(s), specifically for charging?
> 
> But if you want to know more about hysteretic control, may I suggest one of the sites of suppliers of control ics.
> ...


As a matter of fact, I do have a complete feedback system with a Buck converter charger CC-CV working right now in Multisim. I can give you the op-amp compensator loop with the values and test it with your favourite SPICE variant. The problem I have is that I can't really test the CC-CV, like, not seeing the charging profile. I am simulating the battery as a DC source and as I increment the CC value, the charging current goes up. So I guess I can only test the CC part only using the ideal DC voltage source. Any ideas on how to test the CV part?


----------



## carlos_ramos (Dec 14, 2016)

carlos_ramos said:


> As a matter of fact, I do have a complete feedback system with a Buck converter charger CC-CV working right now in Multisim. I can give you the op-amp compensator loop with the values and test it with your favourite SPICE variant. The problem I have is that I can't really test the CC-CV, like, not seeing the charging profile. I am simulating the battery as a DC source and as I increment the CC value, the charging current goes up. So I guess I can only test the CC part only using the ideal DC voltage source. Any ideas on how to test the CV part?


Apparently, I was doing the experiment in a wrong way. It's fixed now.

Here is a parameter sweep of the CC value and the different charging times. Note that this is just exaggerated and it just to test the controller. There is a little bit of overshooting but that can be fixed by redesign the controller. I would prefer a slower response with respect to the floating voltage.


----------



## Tony Bogs (Apr 12, 2014)

Actually, when I asked for suggestions, I meant papers, books etcetera, in response to your original question regarding reading material to learn from.



> Do you have a reference (papers, books or anything) to learn about CC/CV hysteresis charging and how to implement it?


I am not going to use a feedback control system for the buck stage. 
Pulse charging requires a very stable response without any chance of overshoot, ringing ....

TI has some papers on hysteretic control and its superior response to control input steps, load changes and circuit variations. 
Can not be matched by a feedback control system.

What I can say about running simulations: 
1. Make a model of your design. Often a small signal AC model for feedback control systems.
2. Convert it for use with the selected simulator.
3. Run the simulation.
4. Verify the result by using an analytic method. 

For instance in the case of the resonant AC preheater I did not use a Spice IGBT model but a programmable pulse current source in stead.

The HV buck controller is a good example of a feedback control system:
nice current mode controller, lots of info available, easy to make a model of.

Oh yeah, no floating in my charger, i.e. voltage at the output with a full battery, no way.


----------



## Tony Bogs (Apr 12, 2014)

No float charging? But then: what else will be used to keep the battery fully charged?
I'll get back to get to this question at the end of this post. But first:

*THE PFC PARALLELING ISSUE

*Finally! I think I have figured it out. The issue with the parallel mosfets, that is. 
It shows how easy it is to get it wrong. I was convinced that the PCB layout was symmetrical enough for paralleling. 
Well, it wasn't. The track connecting the mosfets to the current sensing resistors had the entry point at the wrong place. 
One mosfet had a significantly higher resistance in its path to the resistor. 
A 1:2 ratio, with about the same values as the mosfet on-resistance of 100 to 150 mOhm.

A short in a scope probe (yes, the mishaps continue, two inch fireball) drew my attention to the right track. 
The parallel current sensing chips were not damaged equally by the high short circuit current. 
I have moved the entry point and ordered some nice low cost (< US$10 a piece) , rugged (square SOA) polarHV IXYS mosfets*.

IR25750 dynamic over-current protection

*At last: the Infineon IR25750 current sensing device will be put to the test in a circuit for dynamic over-current protection. 
The circuit reduces the duty cycle of the gate drive signal at high currents and junction temperatures to protect the PFC power mosfets. 
The IR25750 senses the drain - source current by passing on the voltage across the drain-source channel to the output of a so called "source follower" output, but only during the on phase of the mosfet. 
The voltage it senses is the product of the on resistance Rdson and the drain current Idrain. 
Since RDson increases significantly with increasing temperature, it also senses the junction temperature indirectly. 
The junction temperature rise is caused by the power loss in the mosfet as the drain current increases. 
It rises with a certain time lag due to the dynamic thermal resistance of the mosfet. 
And then there is the dependency of Rdson on the drain current itself. Another positive effect.
So effectively, the output voltage of the IR25750 is an exponential function of the drain current, partially with a time lag. 

The time lag is important, because it allows the use of an averaging circuit for the determination of the duty cycle of the drive signal from the ICE2 PFC controller. 
A RC circuit will be used for averaging. The time constant has to be several times the period of the gate drive signal for an acceptable ripple voltage on the capacitor. 

*SoC CONTROL

*In this charger design the buck (output) stages will be using hysteretic control. 
In stead of aiming for exactly X (volts or amps) hysteretic control allows for a small deviation y, so any value within the window X-y to X+y is OK. 
A typical window (hysteresis) is 1%. Also very important: hysteretic control can not be described mathematically by functions in the frequency (s) domain, since control is discontinuous in time. 
An advantage of hysteretic control: in almost all cases it has a (much) higher efficiency.

So with hysteretic control it is not possible to implement float charging at exactly X volt.
The battery voltage is monitored by a hysteretic SoC control circuit. 
As soon as the battery voltage hits the lower window threshold, the charger is turned on. 
The charger is switched off when the upper limit is reached. 
So there is no energy wasted in a float charging proces, that implies an always on, relatively high loss charger to trickle charge the battery. 
The SoC control circuit is powered by a wide input HV buck regulator, 100 to 500V in, low voltage out. 
BTW, this buck regulator is a frequency compensated closed loop circuit, _but with hysteretic control at low loads = burst mode_. 
So it is a very light load for the battery (50 to 100mW standby).


----------



## Tony Bogs (Apr 12, 2014)

*PFC 1.0*

The first REV1 (or 1-series) board design. For the PFC module.
I have dropped the IR25750 for obvious reasons. 

All the issues that emerged during the test runs have been addressed. 
Like for instance ground line issues. Hall sensors, no sense resistors in the ground line(s). 
Isolation in the mosfet driver stage (ACPL-332J optocoupler).
The ACPL also has the desat protection, that worked so well on the ACPL-339 driver board.

And most if not all of the features have been implemented. 
Duino style microcontroller for monitoring and configuration (Atmega328P) with isolated CANBUS,
optional liquid cooling, interleaving for high amps (6600W, 120Vac in). 
One power board for all power levels and AC input voltages (3.3 / 6.6 / 12 kW), 85 to 265V AC, 50/60 Hz). 
Control boards: 1 base control board, 1 extension piggy-back board for interleaving (delay line + hysteric control for current matching), 1 to 3 slave driver boards for the interleaving phases. 
The layouts for the power board and base control board are shown in the first image.
All SMD parts on the power board have been replaced with TH or they have been moved to daughter boards.

*AC PREHEATING

*The picture shows the prototype board with the cap array soldered on.


----------



## Tony Bogs (Apr 12, 2014)

The control board for the resonant AC preheater. 
It is not yet the final version that will be sent to the foundry,
but it is close enough to get a good impression.
The high resolution png image shows the board with its headers lined up with the main board.

Component values may change, some values have not been determined yet.

Not a mimimalistic ATTiny board, but again a board based on the very popular ATmega328P. 
Only one pin is unused: ADC7. It can be used later on to measure the battery voltage directly in case other methods do not work. 

Features:
- isolated CANBUS
- relay output 
- measurement of ambient and cooler temperature, resonant tank voltage, tank frequency, IGBT gate drive and on-state voltages, preheating current, power output (heat).
- Preheating amp profile, time out can be set via canbus (within functional limits).
- Preheating stops when the delivered heat drops below a preset level or when preheating times out. As the battery pack heats up, the internal resistance decreases. 

Heating up a battery pack can be very risky. So it is time for a disclaimer and warning. Just in case someone, although highly unlikely (see pictures of mishaps), gets the wrong impression.

*Disclaimer and warning:* All boards in this thread have been designed for evaluation purposes and my personal use only. 
Shown applications in this thread do not imply fitness for those applications or any other particular use, including evaluation. 
The boards operate at high voltages, currents and power levels, that may cause serious harm and damage. 
The boards may contain flaws that can cause hazardous conditions, including, but not limited to, danger of fire and explosion.


----------



## Tony Bogs (Apr 12, 2014)

Here it is: the prototype of the AC pre-heater control board. 
Very easy to program with the xxuino environment and avrdude (spidev0.0) from a fruity pi. See picture.
I have added a new 328P board (magma) and core map to the environment. 
Quite a few modifications were needed. For instance: the routines for millis etc. had to be moved from timer0 to timer1. 
It is great that a very cheap 16x2 LCD display works out of the box on the TWI pins with the immediately available liquidcrystal and wire libraries. 
The LCD replaces the cumbersome and awkward serial monitor.

So far everything works just fine. Only had to add a few pull up R's and a small ICSP interface board for the PI.


----------



## Tony Bogs (Apr 12, 2014)

Unfortunately, other matters have priority, so I can only spend about half an hour a day on average on my projects.
On the positive, the 328P architecture has a huge xxduino open source community support. Great for fast prototyping. 
The video in the zip file shows the up and running controller board during a test that measures the gate pulse duration. 
Main board auxiliary HV buck circuit supplies power. Input voltage to the main board is 90VDC.

LCD shows gate pulse count and ADC values of ambient temperature, cooler temperature circuits, and supply voltage of the gate driver circuit.


----------



## Tony Bogs (Apr 12, 2014)

The image shows a schematic of the input filter for the auxiliary HV to LV buck converter that powers the microcontroller. 
For proper operation of the converter at a low input voltage, a 2uF bypass capacitor (C1 in the schematic) is the minimum. 
Without filter inductors L1..L4 capacitor C1 is a high amp bypass for the 25Arms 3 to 5 kHz AC preheating current. 
The filter inductors reduce the AC bypass current from to 1 Arms range to the 10 milli Arms range. 

WARNING: THE AC PRE-HEATING CURRENT MAY HAVE ADVERSE EFFECTS ON CIRCUITS THAT ARE CONNECTED TO THE BATTERY DURING AC PREHEATING. 
THE EFFECTS MAY INCLUDE OVERHEATING, SHUTDOWN OR OTHER ABNORMAL OPERATION AND PERMANENT DAMAGE.

BEST PRACTICE: DISCONNECT ALL OTHER CIRCUITS

I am thinking primarily of the widely used HV to 12V DC/DC converters that supply the low voltage subsystems of an EV.
A seperate low voltage battery can provide a solution: disconnect the charger for the low voltage battery from the main HV battery during pre-heating.

If circuits can not be disconnected: try a filter, similar to the one shown, with appropriately rated components.


----------



## Tony Bogs (Apr 12, 2014)

On march 28, 2017, Ford and SAE published a paper with some very interesting findings after repeatedly charging a Panasonic Li-ion UF121285 5Ah prismatic battery
with (NiMnCo)O2 anode and graphite cathode from 0 to 100% SoC in less than 4 minutes at a high constant rate of 16C.

http://papers.sae.org/2017-01-1204/

Based on the online preview, my conclusion is that the results support the approach to charging in this thread:
- no CCCV needed, charge at a high constant rate until a voltage threshold or 100% SoC is reached 
- pulse charging is used to determine impedance values
- 3 to 5 kHz is the right frequency for AC pre-heating (based on EIS battery impedance measurements)


----------



## Tony Bogs (Apr 12, 2014)

The prototype (see picture) is almost ready for the first "live" run.

In active mode, during pre-heating, the ADC runs in interrupt mode and at maximum speed (1 MHz). 
A sequence of AD conversions is performed when zero crossings of tank current (pin change PCINT0) or voltage (INT0) trigger an interrupt.


----------



## Tony Bogs (Apr 12, 2014)

*Minimal BMS *

A minimal battery monitoring system is an integral part of the charger design.

To comply with safety regulations for road legal cars, 
a micro cell monitoring circuit (see attached schematic) sends an allert to a picopower controller 
when the cell voltage or temperature exceeds a threshold. 
The voltage thresholds are fixed in hardware (4.2V and 2.5V LiMn); the temperature thresholds can be set by software.
The term micro applies to both size and current load for the cell.
Boards can be individually connected to the controller 
or in banks with data lines (temperature sensor) en OC outputs tied together.
The circuit can be used with a number of "equivalent" window comparators: MAX923, LTC1442, TS9002, LTC1843. 

It has been designed for a LiMn (Leaf) based pack with a temperature sensor at each cell. Top balanced at 95% SoC, lowest SoC 15%.

The picopower controller is directly (i.e. non isolated) powered from the main HV battery 
via a low standby current Viper26LD buck circuit, wide HV in, low voltage out. 
The controller communicates with the outside world via an isolated CANBUS transceiver. 
For interfacing with the many cell monitoring circuits the MCP23S17 SPI I/O expander offers a flexible solution.

The pack current is measured with a Hall sensor. 
Although some application manuals indicate otherwise, in most cases a 50kHz bandwidth is sufficient in an EV, 
since line inductances and capacitor banks act as a low pass filter with a high dB/octave dampening.


----------



## Tony Bogs (Apr 12, 2014)

The LTC 1843 is the cheapest solution (at least at my suppliers). 
Schematic (pdf), simulation circuits (LTSpiceIV, ascfiles.zip) and simulation results (png).


----------



## arber333 (Dec 13, 2010)

Thanks for the schematic. 
I think that for single cell BMS design this is still too expensive. Our low cost DIY design is cca $8/cell and can have voltage reporting, hi voltage and lo voltage cutoff, error LED signal, serial comms and great EMI resistance. It can be programmed to reduce charging when a single cell reaches preset value. If charger supports that. 
Of course it is only 10bit ADC i think so cell difference is 0.005V apart. In reality it is more like 0.02V error, some because of difference in reference diode and some because of different resistance. I can live with that since i dont charge to 4.20V fully, only 4.00V.

I have developped 8s PCB that is good for packs of LiPo cells. It would be good for LiIon cells also. I have code as well as gerbers published and i work on next revision for balancing up to 0.5A now. 1A with 6R8 resistor is just too high in restricted space of battery case and requires ventilation. 10R 2W resistor is better option.

http://forums.aeva.asn.au/forums/low-cost-bms_topic2753.html
https://mazdamx3ev.wordpress.com/tag/bms/


----------



## Tony Bogs (Apr 12, 2014)

Nice boards, look good. Microchip pico power controllers if I have seen it correctly, both the 8S and single cell. The schematics I have seen were low res. 

I consider ADC logging of the temperature of the cell to be more valuable than voltage logging. 
It does make the circuit a little bit more expensive, but that is $3 to $4 (US) well spent. And I prefer HW detection of voltage thresholds. 
The Dallas DS18S20 temp sensor has an ADC converter and a 1 wire interface (supported by xxxuino). Very low standby current.
But it has crossed my mind to try a uC. But even at low speed, the active current is in the mA range. 
I want to keep the current drawn from the cell well below the 10uA, so the board can be active all the time and wake up a central controller from sleep mode in case of an alarm. 

I also charge up to 3.95V (LiMn Sanyo 95% SoC spec), top balanced, low DOD for longer service life, so no need for BMS balancing and voltage measurement of individual cells. Pouch or prismatic. No thumb sized cells.

Main features of my circuit: < 10 uA board, temperature logging, HW hi/lo threshold detection and on/off (if the charger supports it), active 24/7, volt/temp alarm function (with a single controller). Very easy to connect.
EMI is not an issue (all very low frequency: signals and circuits, Dallas sensor has CRC on 1 wire).

I have switched from the LTC 1843 to the LTC1442/ MAX923 (almost the same circuit), because there is a low cost equivalent: the TS9002 ($0.65 in stead of $5). Still in stock in high numbers at suppliers, but no longer in production.
With the TS9002 the board is about $10 (US), including PCB. Small series (10).


----------



## Tony Bogs (Apr 12, 2014)

The board layout of the microbms LTC 1442 circuit. And LTSPICEIV asc file /results.
Designed following rules from a major PCBA foundry (soldering by hand). I think I am going to need about 112 of them.
So it is clear that the first steps have been taken for the next stage of the charger: going from DESIGN to BUILD. 3300W modules.

The LLC needs some further design (L6699 controller). And a bigger (ETD59) core.
PFC is going to be build as first designed: 65kHz, 3" inductor, but with a single high amp Si mosfet and a desat driver.
Power buck is straightforward. Nothing really new. 
Filter/rectifier/precharge board: worked through all the mishaps without issues.
The PTC protection of the precharge resistor works great.


----------



## Tony Bogs (Apr 12, 2014)

MONITORING AT PACK LEVEL
The first pdf file shows a full HW integrator for measuring Ah (fuel gauge). 
It has a lot of components. But the SAR ADC of a MCU can be used and bandwidth limiting is built-in.

The alternative is ΣΔ ADC. These are low cost (recently) and great for sensors with a very limited (intrinsic) bandwidth like temperature sensors. 
However, volt and amps have higher bandwidths in an EV. 
The microchip AN1156.pdf application note discusses a fuel gauge based on the MCP3421 with sampling that is not continuous in time. 
I have some reservations with regard to the application of this method in an EV. 
When a ΣΔ converts, it is an integrator that doesn't miss a single bit of charge. But in between conversions? 

How microchip handles this issue?: no idea, no zip file with firmware to be found on the site.

So I'm going for ΣΔ in continuous conversion mode. 
The MCP3421 and 3425 do not have the most recent high order filter, but they sure are powerful in a tiny package (SOT23). 
For continuous mode, two are needed for volt and amp.

The second pdf file shows the anti-aliasing filters. 
One filter has a selectable cut-off frequency: one for charging (larger bandwidth, controlled input) and a narrow bandwidth for discharging.


----------



## Tony Bogs (Apr 12, 2014)

*MICROBMS*
As I mentioned, the low cost TS9002 is no longer in production. 
When more than 100 circuits are needed, cost is an important factor.
Luckily, I found a good replacement part, well, actually parts. 
And they have better specs. Automotive grade, -40 deg C to +125 deg C,
wider supply range: the Microchip MCP65R41/1202 and MCP6541U.
Other modifications to reduce cost: single optocoupler, cheaper model,
but with a higher isolation voltage and optocoupler continuously on when Vbat > 4.2V.
There are issues with the microchip spice models, so no simulation results yet.

*PFC*
The build is going to start as soon as I have more time to spend on my projects.
Ready for interleaving with two mosfet/inductor branches, but not implemented in the controller (yet).


----------



## arber333 (Dec 13, 2010)

I finally managed to make new BMS for my 100 cells. I grouped it in PCBs of 8. But really they are not connected anyhow. This system is very affordable and can report low cell voltage. By report i mean it can be setup to reduce throttle very similar like power tools. 

In reality it is TL431 reference with possibility of opto string connection in AND or OR configuration. So charger can be configured to stop when every cell reaches balancing limit or it can reduce charge when any of them reaches balancing. 
Then i have Microchip voltage reference set to 3V. It is supposed to trigger my inverter BMS input to lower torque.
I can add or reduce modules from PCB and in reality only thing to change are 3 comm lines.


----------



## Tony Bogs (Apr 12, 2014)

I'm going for 12 cells per board. Never going to charge to more than 4V, so an array always stays within the 50V safe zone.


----------



## Tony Bogs (Apr 12, 2014)

Pffffff, I think I have finally found a reasonably priced Si mosfet that can take the high peak current of the ICE2 controller for the 3300W 230V PFC : 
Onsemi (Fairchildsemi) FCH041N60*E* http://www.onsemi.com/pub/Collateral/FCH041N60E-D.pdf
The amp rating is in the maximum safe operating area plots (figure 11) on page 4 @ 500V.

So it looks like it takes a 41 mOhm, 77A, 231A peak specified Si mosfet for 12Arms PFC current.

The SIC diode in the PFC does not need an extreme rating @230V: 12A STM STPS1206
It has been a lot of fun, all the nice fancy features like interleaving, but from now on it is back to basics @3300W per module.


----------



## WolfTronix (Feb 8, 2016)

http://www.wolfspeed.com/c2m0025120d

1200 V, 90 A, 25 mΩ, TO-247-3, SiC MOSFET

I approve of the company name.


----------



## Tony Bogs (Apr 12, 2014)

No Wolfspeed parts, sorry!  Maybe in 2027. 

Still too expensive (C2M0025120D US$70) and the spec [email protected] , 10usec 
does not meet the Safe Operating Area requirement for hard switching in the PFC. 
Next SiC in line is a brick model.

The Onsemi Si FET is US$ 6.


----------



## Tony Bogs (Apr 12, 2014)

A lot of checks and double checks have been done on the PFC circuit. It is up and running again. 
Fortunately, the rev 1 board needed very few modifications for a single Si mosfet. 
Schematics have been done in the latest version of Kicad.

Applying 3.3 to 5V to an optocoupler input switches the PFC on. 

Mains filter board still works fine.

The design for the buck stage has been ready for some time now.
Charge current is set by applying a simple PWM signal to the optocoupler control input. 

Now, let's design a board for the buck and we'll have a set of modules for a single phase 230V non-isolated charger. Power only limited by the rating of the wall outlet. 

With a bit of luck and a lot of elbow grease hopefully within a couple of weeks.

LLC, the isolation stage for three phase outlets, is going to take a bit longer. It will have the brains to communicate via CAN.


----------



## Tony Bogs (Apr 12, 2014)

The schematic of the current mode buck stage with hysteretic control has been reviewed and modified for a LEM current sensor, Si mosfet and isolated I/O for a xxxduino.
Charging current is set with an "analog" PWM signal: duino analogWrite to a PWM pin.
Feedback is provided by a TI AMC1100 isolation amplifier with a differential output.
A basic differential to single ended opamp circuit makes it OK for duinos. 

So it shouldn't be too hard to write a simple duino sketch for evaluation and test runs.

Schematic is already in the latest KiCad release. Just add a few special footprints (LEM ..) and the board will be on its way.


----------



## Tony Bogs (Apr 12, 2014)

I'm sure you all spotted the odd looking startup bootstrap BSS135 circuit.

And you're right, here is the correct schematic for it. 

For high amps (up to 35A for ~90V battery), two TLC/10 inductors are needed to keep the frequency in check.

And of course, there will be a hardware overtemperature shutdown, simple NTC on the cooler.

The iso amplifier with will be placed on a daughter board. With the differential to single ended opamp output circuit, so there won't be any duino breadboarding. 
The daughter board can be left out in the final charger assembly.


----------



## Tony Bogs (Apr 12, 2014)

The parts have been ordered. Delivery from stock. 

A protoype quality board (only copper, no silk and mask) can be ready in a couple of days.

Did I mention that this charger can be run without a controller if the battery has a BMS with a shutdown output (duh!)? 
And the BMS can be brainless too. Who doesn't love the pre uC era? 
Well, I guess everyone, especially the VW Beetle converter guys. There's no way to beat a Beetle when it comes to brainless simplicity.

All it takes it a little bit of very simple hardware, mainly a potmeter based PWM generator (simple as pie) and a BMS shutdown.

There's no need for precharging and there's no risk of sparking when connecting the charger output *directly* to the pack. Thanks to current mode.

Just plug in the charger in an ordinary wall outlet and the juice flows until the BMS shuts the charger down.


----------



## Tony Bogs (Apr 12, 2014)

The parts of the latest version of the charger (buck) output stage have been spread out in the KiCad PCB designer. Big step forward. 

The charger does not need a controller, but a simple 32 pin 328P Arduino adds some nice features like constant power output. 
A simple sketch allows the charger potential to be utilized to the max.


----------



## Tony Bogs (Apr 12, 2014)

Air cooled systems need fan control. Fans that are unnecessary loud are terribly annoying.

I'm going old school with the SMBUS-free and cheap as dirt TL494 PWM controller and a state-of-the-art, high isolation, 2Amp optocoupler-driver FOD8320. 

Never heard of the 494? No surprise, it is dinosaur from the 80s, but it still does the trick and now with a temperature spec of -40C to 125C : http://www.onsemi.com/pub/Collateral/TL494-D.PDF


----------



## Tony Bogs (Apr 12, 2014)

arts have been placed on the default size board for the development (10x16 cm).
The big 8cm diameter x 7cm height inductors will be mounted on another board.
Iso amplifier, controller for the aux HV input power supply and fan control: daughter boards.

This board has been designed for a 350 to 450V pack @ 7 to 9 Amps output with acceptable losses. 
Lower voltages at high amps are possible in the version with a LLC. 
A controller is needed to lower the LLC output voltage to the buck stage. 

LLC is on its way. With an ETD59 or a huge 74x59 mm potcore transformer. The coil former for the potcore should be in this week.


----------



## Tony Bogs (Apr 12, 2014)

Two daughter board layouts done, a few more still halfway. Fan controller and hysteretic controller. The images show straight header strips, but there will be male angled ones soldered in.
During development there will be female header strips on the main board to make it easy to handle and modify the SMD circuits.


----------



## Tony Bogs (Apr 12, 2014)

I had to stay up late last night and so I had the opportunity to do a lot of the tedious stuff on the boards.

And I found another classic "old school" IC. This one, the LM2917 http://www.ti.com/lit/gpn/LM2917-N?keyMatch=lm2917mx-8&tisearch=Search-EN-Everything is intended for tacho applications in ICE cars,
and as such it is also very useful in the buck stage to control the switching frequency in the hysteretic circuit. 
According to an e-mail response from a TI employee on the company's support forum the buck frequency range is within chip limits. 
Performance may be affected, but that's no problem in the buck stage. No need for high linearity or accuracy.

The schematic shows the LM2917 of the frequency to voltage converter. The output voltage and a set voltage are fed to an MCP6L91 error amplifier that controls the hysteresis and thereby the frequency.

Vet techs know this, but for everyone else: at high amp levels the loss in power devices in current hysteretic controllers increases exponentionally when the frequency is not kept in check.


----------



## Tony Bogs (Apr 12, 2014)

The tiny controller (HW and SW) is the last daughter board.

The hysteretic control circuit has an upper and lower current limit.

The upper limit is set externally by an "analog" optocoupler PWM signal.

The lower limit is determined by:
1. an overtemperature circuit that kicks in when the maximum temperature of the cooler is exceeded (hardware protection), and
2. an Attiny25 controller circuit that calculates and sets the maximum switching frequency based on measurements of battery pack voltage, 
voltage at the input of the buck stage and average charging current in order to keep the power stage in the safe operating zone at high output amps.

The image shows the circuit diagram.

With the attiny25 the buck stage has isolated "analog" PWM on input and output.
Output is the actual average charging current.

Next post will have pictures of the prototype.


----------



## Tony Bogs (Apr 12, 2014)

The printed circuits are ready to be populated. In total 9 PCBs in this prototype stage.
Smallest board is about 0,6 x 1,5 inch. 
One is not going to be used. It is the iso amplifier board, that has been replaced with a PWM output on the ATTINY25 board.

Sorry, no pictures yet, my 2M phone camera is dead. I'll get a new one.
My Windoze system died a bit longer ago. And the penguin version of the application sofware is beta. 
Took almost three years before I bought a Windoze replacement for the USB hardware bits that need the blox. 
I had to wait for W10, I didn't want a W8 piece of ... or the outdated 7. 
So it will be scope and other W10 produced images until I have a new camera, but they will be a lot clearer from now on.
And Kicad stuff from the penguin system, of course.


----------



## Tony Bogs (Apr 12, 2014)

*Buck stage*
The prototype of the buck stage will be entirely realized in hardware. Only a few more boards to go. 
There will be no time wasted on bit-banging in this phase of the project in order to get results as soon as possible.
A tiny opamp circuit converts the amp setting to a frequency with the assumption of a fixed input and output voltage: 400V in, 230V out (nominal voltage of the heaters that are used as a battery standin). 
It does mean that the maximum output current of the buck stage has to be limited to 21A. OK for the first trial runs. 
And a UVLO circuit for the 5V supply has been added. Reason: the LM211 comparator does not have a rail to rail common mode input range. Without UVLO false triggering (high voltage on output) can occur in the "hardware only" configuration. Threshold ~ 4.3 to 4,5V. 

*BMS Intermezzo.* The BMS project goes on in the background. 
Recently a few decisions have been made with regard to the temperature measurements.

First a reminder of the main features of the micro BMS:
- hard wired, battery cell specific low and high voltage thresholds. 
- thresholds are at approximately 80% DOD: increased battery lifespan
- minimal system, no measurement of individual cell voltages 
- balancing is done off-line (pack disconnected), based on maintenance schedule, degrading performance or when indicated by a single monitoring microcontroller
- single microcontroller is only active on alerts and during operation (includes charging, driving and main power on mode), no system-on-chip solution per cell: very low power consumption
- no on-the-fly balancing: BMS "accidents" are impossible
- only static and very low frequency circuits with strong filtering, resulting in high EMI immunity and low layout requirements
- very low load on cell: 10uA range, no system-on-chip / microcontroller mA load
- low speed, low power, all silicon 1wire temperature sensor(s) on every cell 
- CRC fault check on 1wire communication
- cells are grouped in banks of twelve

Update concerns the 1wire temp sensor network:
- only active when charging, driving, and in power-on mode. A bit longer active to detect thermal runaway. Very low power consumption for a large number of sensors.
- xxduino AVR library supports 1wire: for now ATMEGA64C1 (CAN on-chip) controller
- two I/O pins drive all sensors through a P82B96 bus buffer, followed by
- a high amp IXDN609 or IXDN604 driver stage for the high isolation (1440VDC working voltage max) optocouplers of up to 24 banks (practical limit = 8, 400V pack NMC) of twelve cells, 2 optocouplers (up- and downstream) per bank, so only 16 optocouplers for a 400V pack.

The BMS can not be realized without some programming so it takes a bit longer to get results.


----------



## Tony Bogs (Apr 12, 2014)

BMS intermezzo II: power supply for the temperature sensors of a bank of 12 cells.

PNG shows the basic schematic of the isolated power supply for a bank (no part values). 

1. A Viper high voltage in - low voltage out auxiliary buck circuit (described earlier) at pack level powers the isolated milliwatt converters for the the banks.

2. The topology of the isolated power supply is very simple. It is basically a zener shunt regulator with a DC to AC (square wave oscillator)- TRANSFORMER - AC to DC (schottky diode bridge) front end. 
The leakage inductance of the transformer is the main "loss free" shunt impedance in series with the zener.

3. I have picked a Wuerth dual winding TH line choke as a transformer. http://katalog.we-online.de/de/pbs/WE-TFCH?sid=d91158f6ec
Rated at 400Vac, with two seperate coil chambers, its isolation is OK for a 400V pack (96S).
The construction guarantees a significant leakage inductance, leakage about 1%. Small size.

4. As an alternative the SMD Epcos has a specified leakage inductance, but its value is lower.
https://en.tdk.eu/tdk-en/530122/pro...-chokes?so={"orderingCode":"B82720S2601N040"}


----------



## Tony Bogs (Apr 12, 2014)

First hi-res images of the engineering version mockups of the buck stage.
Some checks have been done on the boards. So far only minor issues.


----------



## Tony Bogs (Apr 12, 2014)

The buck stage, running at a safe 90V test voltage, has delivered its first charge to a 12V (laptop) battery at 0.6 and 1.2 Amps. Average values measured with a multimeter.

The simple FAN73711 level shifter had to be replaced with an isolated gate driver board. Schematic is in the pdf file.
The Si board is much smaller than the SiC driver board(s). Only a fifth of the size: 1.7" x 2". Including a 1/2" x 2" isolation gap.
This iso power supply of the board is based on the FAN7621S, running in open loop mode.
It drives a full bridge and a 1:1 off-the-shelf Wuerth transformer (dual winding common mode choke). 1800uH main inductance, 18uH leakage.
As usual, there were some startup issues, but they were easy to solve. 

Two major issues still to solve:
- clean up signals at turn-on (ringing) and turn-off (slow) of the output of the buck stage at the mosfet-diodes-inductor junction,
- the output of the TI AMC1100 iso amplifier circuit is extremely noisy.


----------



## Tony Bogs (Apr 12, 2014)

*THE BUCK STAGE IS READY FOR THE 0-SERIES.*

Hopefully there will be a non-isolated 3300W charger is a couple of weeks.
Fingers crossed that I don't have to spend a lot of time on more important matters. 

Ringing was solved with one of the usual anti-ringing measures for a buck converter: RC snubber. 
Standard method: determine parasitic inductance and calculate the dampening resistor value.

Slow turn-off turned out to be Zero Volt Switching. 

The power supply of the gate driver has been modified. The recommended 9V (10V) for the FCH47N60 mosfet is now supplied to the IXDN609 output driver.
Schematic in the png file.

The AMC1100 circuit still has a high frequency 2 to 5Vpp disturbance signal at the output when the buck output stage switches. 
Maybe capacitive coupling? I'll try a Broadcom optocoupler sigma delta iso amplifier.


----------



## Tony Bogs (Apr 12, 2014)

A bit of info on the current mode buck stage:
- a 60A/1200V diode at the output prevents negative charging currents,
- seen from the battery, the buck stage is a current source, so it has a very high impedance,
- setting the charging current to zero is possible, in fact no current will flow below a setting of ~0.5A. 

These characteristics make the buck stage very safe to operate.

*Modification of the PFC module

*I'm going to use the Onsemi controller FAN6982MY http://www.onsemi.com/pub/Collateral/FAN6982-D.pdf
It has a cycle by cycle peak current limit and no enhancement of the dynamic performance. 
The performance enhancement is not needed in the charger with its static load. 
Goal is to reduce the stress on the power devices when compared to the Infineon ICE2.


----------



## Tony Bogs (Apr 12, 2014)

First image from the USB devices. Hiside mosfet turn-on with RC snubber: 15 Ohm/1W, 1500pF/FKP1/2000V 
A little bit of overshoot (11%) as a trade-off for fast switching.


----------



## Tony Bogs (Apr 12, 2014)

*ISO AMPLIFIER*

The AMC1100 died. Cause unknown. A Broadcom HCPL-7840 replaces the AMC and it works fine. Less accurate, but that's not a problem.
I reviewed the current sensing circuitry. A few caps were added.

Source of 2 to 5V noise: the scope probes were picking up the leakage field from the main buck inductor.

*7KW SiC MOSFET BUCK STAGE FOR 700V+ SOLAR AND STATIONARY INPUT*

The buck stage places much less stress on a mosfet than the PFC. 
So the Cree SiC mosfet is back in a 7 kW, 700VDC input (solar / stationary battery powered) buck stage: 20A @ 350V output.


----------



## Tony Bogs (Apr 12, 2014)

Small steps: the buck stage runs at 300V in (from the PFC and filter stages), 2kW convection heater as load. 

I blew up the remaining 100:1 probe in one of the PFC mishaps. Forgot to order new ones.


----------



## Tony Bogs (Apr 12, 2014)

The (simplified) topologies of the three chargers that I am going to build ASAP.
First image shows the 3300W non-isolated AC/DC (on-board) charger that is almost ready in the "engineering" edition.

Next is the isolated 10kW 3phase (1 phase also possible) version for semi-fast charging at home (stationary /solar pack). Last image: the 50kW(+) battery to battery fast charger (stationary to performance EV = 750V pack).

Scope images show buckstage turn-on and turn-off at 300Vin, 100W out, blue is voltage at the junction of the high side mosfet, flyback diodes and main buck inductor. Red line is the voltage across the 25R load resistor (convection heater), green line is the input voltage (divided by 2).
The linearity of control is pretty good. 0.8A average load (charging) current @ 5% duty cycle PWM in, 2A @ 10%, 3A (225W) @ 15%.


----------



## Tony Bogs (Apr 12, 2014)

FINAL PFC DESIGN 

At moments it has almost been like drowning in a tsunami of information and test results. 
But now enough time has passed to let it all sink in and it's time for the final interleaving 3300/6600W PFC design, 90 to 260Vac in, 400 or 500VDC out: the schematics. 
First: power section (diodes and sense resistors for the 200 to 260Vac version), adjustable desat gate driver and isolated signaling.

Some design considerations (you probably want to skip this): 

INTERLEAVING

It has become clear that interleaving has a lot of advantages in a PFC. 
Easier on EMC, lower ripple currents and less stress on the mosfet power devices.
And in this case (low voltage, high power) the additional benefits of "off-the-shelf" 10A FASTRON inductors, inexpensive 35 micron PCBs and only one TO-247 mosfet per interleaving branch.
Design choices:
- signal generation for interleaving will be implemented with 1 or 3 inexpensive LTC6994-2 silicon delay lines http://www.linear.com/docs/29725, 
- no seperate current control in each branch, inexpensive and easy to design, trade-off: uneven distribution of current between branches,
- up to four branches (0, 90, 180 and 270 degrees shift) can be driven, resulting in a maximum output power of 3300W at 110/120Vac in and 6600W at 230Vac in. 

DESAT

The tests have shown that desat detection is a very effective way to protect a power device in the PFC stage. 
And it is needed, because in case of failure of one or more branches, the remaining branches face a current overload at max output. 
Desat can detect short circuit and current overload, but for the detection of overcurrent the desat thresholds have to be measured and adjusted. 
Without adjustment the threshold may vary from 60% to 140% of the nominal value.
OK for short circuit detection, but not for overcurrent detection.
Once adjusted, desat fault is triggered by a combination of junction temperature and drain current.
The FCH041N60E mosfet http://www.onsemi.com/pub/Collateral/FCH041N60E-D.pdf has the required high amp SOA-rating at all temperatures and it is less inexpensive than the FCH76N60 I picked earlier.

BROWN-OUT

The FAN6982 has brown-out detection. The Infineon chip I used earlier does not. 
When brown-out is set at ~170VAC, only two mosfet/diode/inductor branches are needed for a 230 (200 to 260) Vac 3300W PFC. Below 170Vac the PFC shuts down.
For the wide input version (90 to 260 Vac), two power sections (four branches) are needed: 
one is the master with the FAN6982 controller on-board, the other one is configured as a slave. 

BOOST VOLTAGE MEASUREMENT AND FAULT SIGNALING

Since the boost voltage has a limited frequency bandwidth, a LTC6992-2 voltage controlled pulse width modulator can be used for A/D conversion. 
Modulation of the LTC6992-2 http://www.linear.com/docs/29337 stays in the 5 to 95% region, allowing 100% to be used for fault signaling.
All optocouplers are high VIORM (1414V).


----------



## Tony Bogs (Apr 12, 2014)

Daughter boards for the PFC. I'm going to order two of each in bare engineering version (no silk, no mask), 
but schematics and layouts (including references in silk layer) are ready as can be seen in the images.

The logic board handles desat (latching), power on reset, 5V logic UVLO, shutdown on fault and gate signal delay.

The images show straight headers, but angled ones will be soldered in.

The driver board supports two different optocouplers. In the image they appear to fused together, but of course only one will be placed on the board.

And finally, some parts do not have a (correct) package description in the KiCad 3D library.


----------



## Tony Bogs (Apr 12, 2014)

Well, it took a while, but here it is: the PFC main module board. 
Slave board is identical. Less parts are mounted.
Inductors are not on the board.


----------



## Tony Bogs (Apr 12, 2014)

First batch of PFC daughter boards has been approved for production by the team of PCB manufacturing engineers at the foundry. 5 pcs/board, proto with mask and silk.
Still in the process of modifying and tweaking the PFC main board and slave daughter board. 
Latest mods: SMD current sense resistors (Isabellenhuette) and clearing space for liquid cooling (optional, Austerlitz WK85 extrusion cooler).
Parts and boards ready for assembly: second half of february.

Image shows schematic for the main board.


----------



## Wolfram (Apr 19, 2015)

I see a potential problem with the way the second phase for the PFC is generated. The LTC6994 is not really a delay line by the traditional definition. If the input signal changes before the delay time has passed, the output will not change state at all (ref. fig. 5 in the datasheet, pg. 14).


----------



## Tony Bogs (Apr 12, 2014)

Thanks for looking at my design in such detail. And yeah, it seems that I overlooked the minimum pulse width. 
It is not a traditional delay-line like those that were once used in color TVs.


----------



## Tony Bogs (Apr 12, 2014)

The panel for the main board can still be modified. 
It was very close to being ordered, but thanks to Wolfram the LTC6994 issue was caught just in time. 

Time for the backup plan.
This is a ASAP project and huge input filter parts are out of the question.

So: a daughter board for the delay line will be added to to the main board panel and the (more expensive) Maxim DS1100 delay line will be used for now.
If a better solution emerges, it should be quite easy to swap boards.


----------



## Tony Bogs (Apr 12, 2014)

And here is the DS1100 daughter board, the look is very 80-ish.


----------



## Wolfram (Apr 19, 2015)

Good news that it didn't cost you any scrapped boards. The advantage of having the control part on a separate sub-board is that changes to the control section can be done without respinning the main PCB with most of the expensive components.

The new delay line method should work, but it will not be a cheap solution to the problem. There are a few other options, as far as single phase interleaved CCM boost PFC control goes. There's the TI UCC28070, which has been around for a while. This chip has a few quirks related to the way they do zero voltage sensing, there are more details on the TI E2E forums. There is also the ST STNRGPF01, which looks like an interesting option. We ended up going with a DSP when we were trying to solve the same problem, but had the STNRGPF01 been on the market then, we might had given it a try.


----------



## Tony Bogs (Apr 12, 2014)

DSP is what I would pick as the right solution for series production in high volume. 

The DS1100 delay line is not cheap in $$, but it is cheap in hours: quick fix. 
I have experimented with the TI UCC28070 (earlier posts) but it had too many issues with more than 2 interleaving branches. 

Boards should be in tomorrow and there's no need to scrap them.


----------



## Tony Bogs (Apr 12, 2014)

I took a deep dive in the archives of logic and I think I found the solution for the delay line: the very,very old CD4517BE. 
The € 0,25 part is almost half a century old but still listed as active on the TI website. 
Of course only available in 100mil DIP, but that's fine.
http://www.ti.com/product/CD4517B?keyMatch=cd4517be&tisearch=Search-EN-Everything

And guess what, it has to run at 15V to be fast enough and 15V (18V max) is a perfect match for the FAN6982 gate output.


----------



## Tony Bogs (Apr 12, 2014)

The schematic for the CD4517BE delay line. It runs at 8 Mhz from a crystal oscillator, so the maximum distortion of the gate pulse and the maximum delay deviation are very close to 125nsec.

The rest is level shifting and UVLO.

Question is now: is the addition of on/off control for the branches in order to achieve a higher efficiency a good idea?

On/off control is implemented in the ST STRNGPF01 that Wolfram mentioned in one of his posts.


----------



## Tony Bogs (Apr 12, 2014)

No idea if this means that the Energy Star requirements can be met (), but the optocouplers for the on/off control for the interleaving branches are on the board of the delay line.

The board will be part of a panel, together with two control boards for the auxiliary high voltage buck converters and the main board. Hopefully ready this sunday for upload to the foundry.

All parts and the first batch of boards (made in the EU) are in. Looking good!!


----------



## Tony Bogs (Apr 12, 2014)

The KiCAD layout of the main board panel is ready.


----------



## Tony Bogs (Apr 12, 2014)

The design choice pays off, just got a quote for the boards:
all boards for one PFC module (6 in total) less than €45, including tax and shipment. 
Conditions: made in EU, 35 micron, two sided, panelised, 10 panels, prepaid (€450).
And a couple of spare boards are thrown in for free.


----------



## Tony Bogs (Apr 12, 2014)

One of the other design choices: make the (isolated) interface to the single microcontroller as simple as possible.

So far we have the following I/O: 
First the filter/input module: precharge bypass relay = GPIO on/off. 
Then there is the PFC module: GPIO pfc on/off, feedback of output boost voltage / fault (ADC input), and (optional for better efficiency) three GPIO on/off for the interleaving branches 90, 180 and 270 degrees. 
And finally: the BUCK stage with PWM controlled current (PWM output) and voltage feedback of the actual average charge current (ADC input).

I'm leaning towards a Pi, mainly because it has great connectivity, allowing wireless (WIFI) interaction with the user. Clearly safer and more convenient than other solutions.
And inexpensive. Estimated cost: less than €50 (excluding modules - Pi cables). Solid linux base.
HW: a Pi zero (with WIFI), and I/O board(s) with the PCA9685 for accurate (12 bit) PWM out (ADAFRUIT 815), the 16 bit GPIO expander MCP23017 and the 8 channel MCP3008 10 bit ADC.
SW: A webinterface with python backend. There are open source Python libraries for the I/O of the HW setup. 
And I'm pretty sure there's some open source webinterface around on the web that can be used as a basic setup.


----------



## Tony Bogs (Apr 12, 2014)

The panel with the main PCB and three daughter boards is in production.
Conductor to conductor distances are based on numbers from the IPC2221 table in the KiCAD PCB calculator, a maximum voltage of 550V and a maximum elevation of 3050 meter.
Perfectly OK for the purpose of evaluation. But a review is needed when environmental conditions and pollution degree have to be taken into account.

Allright, so now the buck stage is next for small series design. DFM: manual assembly.
I've replaced the HVR section of the power board for the PFC with the dual optocoupler circuit. 
Now the power board can also be used in the buck stage without modification.
The NTC temperature sensor is out, replacement: desat driver and fault circuit from the PFC. Actually, in general the approach will be to use as much as possible the same parts, circuits and PCBs on all modules.


----------



## Tony Bogs (Apr 12, 2014)

The functionality of the hysteretic control has been verified, so it's time to pick a suitable buck controller chip: the TI LM2694 http://www.ti.com/lit/gpn/lm2694.
It features adaptive Constant On Time, the 2.5V feedback reference is a good match for the LEM current sensor and the package size is OK for manual assembly and PCB production.

Picture: the inexpensive naked but shiny proto PCBs for the DS1100 delay lne, just in case.


----------



## Tony Bogs (Apr 12, 2014)

PFC
The countdown on the assembly of the PFC boards has started. Number 1 is a dual gate driver board. 
Only two minor assembly issues came up and they were easy to fix without modifying the PCB.

BUCK
The image shows the schematic of the basic control circuit for the buck stage.
With the LM2694 the buck stage has triple OCP in hardware with seperate sensors:
- the intrinsic current limit of hysteretic COT control (LEM current sensor),
- a resistor in the ground line connected to the LM2694 ISENS and SGND,
- desat OCP in the gate driver (Rdson).

On the right in the schematic optocoupler U3 allows the main microcontroller to control the operating frequency of the LM2694. 
A duty cycle of 0 (@1kHz) from the optocoupler results in a voltage of about 8.6 V at the VIN pin of the LM2694. 
The voltage increases linearly to a maximum of 16.6V with increasing duty cycle. 
The optocoupler replaces the ATTiny circuit, resulting is a substantial reduction of the number of components.

On the left the L1 inductor circuit serves two purposes: 1) a clean turn-off signal for the gate driver and 2) charging of the boost capacitor of the LM2964.


----------



## Tony Bogs (Apr 12, 2014)

A simulation of an equivalent circuit of the flyback output circuit of the buck controller shows that a number of modifications are needed: resistor R5, diodes D7, D6 (add) and resistors R2, R3 (lower values).


----------



## Tony Bogs (Apr 12, 2014)

Picture of the stack of PCBs for 5 PFC units (master or slave). Mainboard panel just in with one day left in februari, so on schedule. 
A set of snap-away boards from the mainboard panel is on top.


----------



## Tony Bogs (Apr 12, 2014)

Those "handsoldering" footprints in the KiCAD libraries work really well.

Only one significant issue so far. Remember wire wrapping? Well, probably not, I guess, but anyway, 
the wire is really thin and the quality is very good: no oxidation, excellent solderability and the insulation is heat resistant (probably PTFE).
I had to use a 2 inch piece of one of the many left over bobbins, that I have kept in the attic for decades, 
to reroute a compensation circuit from ground to VREF on one of the boards. Oops. 

No need for excessive exposure of bare Cu, Ni or Sn though. The CD4517 delay line works great.

Picture: the five daughter boards with most of the parts on them for a master PFC module.

Buckstage: I'm considering adding bidirectional operation in combination with boost as an option for convenient energy transfer between high voltage packs.


----------



## jackbauer (Jan 12, 2008)

Built a 6802 board with wirewrap back in the day


----------



## Tony Bogs (Apr 12, 2014)

Period correct, my first micro design was a Z80B. 
Yeah, mind the B, a whopping 4 MHz, so I have only used wire wrap a few times.


----------



## PStechPaul (May 1, 2012)

I bought a roll of multicolor wire-wrap wire sometime ago. It is tin plated and solders well, but the insulation melts easily. I use it on prototypes, where the colors help with tracing connections:










Here's the other side. This is (or will be) a 12V battery monitor which has connections for a Bluetooth adapter and an I2C LCD display. I had problems with the display so I made an EEPROM card to plug into the connector to debug the I2C.


----------



## Tony Bogs (Apr 12, 2014)

That is also what I used to do with small scale TH designs, but since the turn of the millenium and and the ever increasing frequencies in designs it's mainly SMT. 
So now the only use is repair. The wire I have is almost as thin as default silk in KiCAD, so I picked white, the same color as the silk.


----------



## Tony Bogs (Apr 12, 2014)

As it turns out after a quick analysis, a boost module is not that much different from a buck. But in a standard boost topology, there's no CCM. 
Consequently, the output of the boost module can not be directly connected to a pack unless a filter and a pre-charge circuit are added.

So I'm going to add boost as an option for an intermediate stage, always connected to a buck output stage. 
Similar to the PFC master/slave approach, buck and boost will have the same board designs.
It also simplifies system design, since buck/boost topologies (Cuk? Sepic?) are out of the question.


----------



## Tony Bogs (Apr 12, 2014)

OK, the PFC has IPC2221 isolation for 1150V, not 550V. The KiCAD PCB calculator showed 1050V in the 500V+ row and I had added a safety margin.
Measured the distances on the board and they match.
Just a few dots of conformal coating and the PFC main board can also be used as a DC boost module up to 1100V out.

And there's more: 
1) the AC input/filter/pre-charge board is also suitable for DC in and out, the final PCB design is 90% ready;
2) it only takes a little bit of rerouting to turn the PFC main board into a buck board.

So what about the LLC? 
It is on the slow burner for now, because there are very interesting developments in this area, 
f.i. the availability of more advanced controllers with anti-capacitive mode schemes and hybrid hysteretic control.

My three phase charger will take a little bit longer, but the non-isolated single phase 3300W and 6600W and DC pack to pack multiple module fast chargers are on the high speed track.


----------



## Tony Bogs (Apr 12, 2014)

The delay line design has been tweaked based on measurements as noted in comments in the attached schematic.
And the power board has been soldered on, the operation verified. 
It was placed 100 mil too close to discretes at the edge of the board (yes, TH issue), but this is managable by simple fixes, f.i. cutting a few TH header pins short. 

*So what does it take to turn the PFC into a high power, interleaved DC booster?*
Not much:
1) a bit of conformal coating where needed;
2) foil caps replace electrolytic;
3) apply a current reference signal to the FAN6982 controller (IAC pin), that periodically returns to zero, 
in order to allow the interleaving branches to reset themselves with regard to the imbalance in duty cycles
that occurs as a result of the design choice to only implement feedback control of the total (sum) of currents in the branches (with point 5 in mind);
4) SiC mosfets and tweaking of the driver board for SiC;
5) accomodate more than 4 interleaving modules, requires buffered outputs on the delayline (easy: line driver) 
and a single point for off-board isolated current sensing (f.i. AD7402, HCPL-788J in the ground line or magnetic sensor on high side, preferred). 

The LEM current sensor circuit that I have designed for my SiC inverter project can be a starting point.


----------



## Tony Bogs (Apr 12, 2014)

*PFC:* The desat thresholds of the driver boards have been set to the correct value for the OnSemi fets and operation verified.

*DC BOOST:*
The driver board does not have to be tweaked for SiC. No changes needed.

Per board the power rating is at least 6600W @ 500V in, 1000V out.

A simple add-on circuit injects a return-to-zero IAC reference signal (attached image).


----------



## Tony Bogs (Apr 12, 2014)

If anyone wonders: what's the reason behind the sudden rush to get results, here's the deal.
I've been expecting a real breakthrough in battery technology for more than 10 years now.
Yes, that's right, my interest in (EV) battery technology started with the news about Toshiba's lithiumtitanate back in 2007. 
And now, in 2018, well, actually march 2017, Jeff Dahn (BTW, I think he's a brilliant scientist) stretched the lifespan of a NMC811 battery to 4000 cycles. 
Yes, you've read it right, a lifespan of more than ten years, every day a full discharge and charge.
And, this is even more important, *no significant increase in internal impedance*. 
https://cleantechnica.com/2018/03/04/exciting-developments-nmc-811-lithium-battery-technology/

Cost? Inexpensive: existing technology and production means, low on cobalt.
And available within one or two years, LGChem and SK Innovation announced the start of production of NMC811 batteries. 
This battery could very well be the secret behind the new Tesla Semi.

Check out Dahn's lecture (only 30 minutes) on youtube. Easy to find: dahn march 2017.


----------



## Tony Bogs (Apr 12, 2014)

The assembled PFC (DCBOOST) board is ready. 
Final checks of the frequency compensation show that interleaving does not affect the inner current control loop. 
In the frequency range of interest, the open loop transfer functions merge.
The V-loop needs a bit more analysis, because the Onsemi FAN6982 has feedforward of the input voltage.
Thanks again @Wolfram, there is a very interesting HOW2POWERTODAY article in the list of documentation of the interleaving ST controller.


----------



## john61ct (Feb 25, 2017)

4000 cycles is way at the expected low end for LFP properly cared for.


----------



## Tony Bogs (Apr 12, 2014)

LFP does have the lifespan and initial low impedance. 
The great improvement by Dahn and his team is the prevention of the production of gas at the cathode, 
even under adverse conditions, for instance at an ambient temperature of 60 centigrade.
If I understood correctly, very reactive O2 is produced, absorbed by the electrolyte and eventually neutralized by the graphite anode as a carbonate. 
Pleas correct me if I'm wrong, but isn't bloating quite common for LFP? 
And in fact, do the assembly instructions not say that the cells have to be mounted in
a strong container to prevent cracking of the plastic enclosures when the cells bloat?

The NMC811 with the touch of prof Jeff also has the benefits of low cost and high energy density. 
Battery company CATL indicates 300Wh/kg+ and I think prof Dahn can push it close to 500Wh/kg with a new electrolyte, based on the info in his lecture of march 2017.

So it's mind blowing big like Musk said about the Semi in his famous tweet.


----------



## Tony Bogs (Apr 12, 2014)

Onsemi published a design note, describing a complete 3300W isolated on-board EV charger. It uses a two phase interleaving PFC and an isolated, full bridge, current mode LLC:

http://www.onsemi.com/pub/Collateral/DN05107-D.PDF


----------



## Tony Bogs (Apr 12, 2014)

First trial run showed that desat works. The PFC was turned on for about 400 milliseconds and voltages were stored on the Win10 scope. 
The values of the caps on the driver board can now be increased. 

During startup the duty cycle increased rather speedy. From 0 to almost 1 in about 320 microseconds. So a startup cap is needed.

The PFC is first operated with one branch. If all goes well, more branches will be added 
and the transfer function will be measured with a network analyzer to make sure 
that the crossover frequency and phase margin are OK for stable operation. 
From literature is it clear that a type II compensator is used in all cases.


----------



## Tony Bogs (Apr 12, 2014)

Et voila, there's boost. 320V pk in, 440V out. Bit much, but OK since it is at light load (~100W) and during a short on period of about 200 milliseconds. 
440V is at the threshold of the overvoltage protection. More checks to do. 

*LLC*
The Onsemi design note, describing an EV charger, has put the LLC back in the fast lane. 
It is now clear how the power level can be increased to 3300W and how the Q factor can be lowered to below 5 in a half bridge topology.


----------



## Tony Bogs (Apr 12, 2014)

The first scope images. Startup showing the drain voltage (blue), gate voltage (red), gate driver power supply (green) and desat cap voltage (yellow).
The 100hz signature is clearly visible in the signal envelopes.

And in the gate signal during steady state when zooming in as shown in second image. Obviously discontinous mode, at low load (75W) and at a point where Vin ~= Vout - Vin.

The gate drive can be improved. Turn-off is too slow and there's a dip during turn-on (gate voltage).

Steady state output is at ~410 - 420 V.

The scope probe loops are picking up strong EMI. EMI goes down as steady state is being reached.


----------



## Tony Bogs (Apr 12, 2014)

The functionality of the PFC has been verfied at low load. Last check concerned the light load threshold. 
Next steps are: optimize the gate driver circuits, prepare the test setup for high load (run the test equipment on battery power) and increase the load in steps.


----------



## Tony Bogs (Apr 12, 2014)

Gate drive resistors 10R+ for turn-on and <= 2R2 for turn-off. 
Prepping for "high power" takes two to three weeks . I have to build an isolated low impedance driver for the network analyzer and I want a true sinus AC power supply. The one I picked has a lead time of 12 working days.

So for now it's full steam ahead with the isolated LLC module.


----------



## Tony Bogs (Apr 12, 2014)

I've placed an order for the LLC mosfet, the 47A Onsemi FRFET FCH47N60F http://www.onsemi.com/PowerSolutions/product.do?id=FCH47N60F, FR as in fast recovery anti-parallel intrinsic diode.
The mosfets will be protected by desat drivers and the anti-capacitive and safe startup modes of the ST L6699 controller against shoot through currents during reverse recovery of the intrinsic diodes.
Nevertheless, soft turn-on is required, so it will probably be a 22R gate resistor, in parallel with a schottky diode for very fast turn-off.

And it's going to be a HB converter, so the order included 20 x 22nF FKP1 1250V Wima caps for three LLCs.


----------



## Tony Bogs (Apr 12, 2014)

Desat drivers? No, what was I thinking? The overcurrent protection of the L6699 is adequate. 
Phew, that means a much simpler design and I think that the board designs can be ready by the end of this week.

Now comes the boring bit.
The math is done for the values of the parts of the gate drive circuit. 
Turn-on gate resistor has to be >=100R to get a safe dI/dt < 800A/usec for the reverse recovery of the intrinsic diodes.
The effective parasitic gate-drain cap is 250pF. The current through this cap can reach more than 1.25A. 
So a low R driver is needed (IXDN609) and the turn-off "resistor" has to be a schottky diode in parallel with the turn-on gate resistor. 
It keeps the gate voltage a few tenths of a volt below the 3V threshold during hard switching.


----------



## Tony Bogs (Apr 12, 2014)

The L6699 daughterboard is on schedule. Parts have been placed on the board and a few tracks.
The other daughterboard can be copied unmodified from the PFC module. 
Main board is the basically very similar to the PFC board with a few modifications. 

Now some might think: 100 Ohm is way too high for driving a power mosfet.
Understandable, but please remember that it is a LLC with ZVS, the mosfets turn on in the third quadrant.

And if they don't, C208 has a low value that will cause the converter to shutdown as soon as the L6699 detects that turn-on outside the third quadrant (in capacitive mode of the LLC network) is *approaching*.

The 100 Ohm is there as a protective measure for exceptional (fault) circumstances like a dead short in less than 7 to 12 microseconds at the output of the converter.


----------



## Tony Bogs (Apr 12, 2014)

The design of the controller /driver board is ready for the foundry.

And here's the schematic for the power section. Basically, what I have done is take two LLCs that work well at 100 kHz, 1500W, 
stitch and glue them together, replace SiC mosfets with Si FRFETs and get a better controller chip.


----------



## Tony Bogs (Apr 12, 2014)

The parts of the 3300W LLC isolation module have placed on the board. Not all accurately yet, but roughly where they should end up. 
The size of the board is about the same as the size of the PFC module with the inductors included.


----------



## Tony Bogs (Apr 12, 2014)

The LLC board design with almost a week delay. It's a panel again. Empty space at the bottom corners has been filled with small SMT daughter boards for sections where parts are tightly packed.

About the control mechanism. 
I have kept it really simple, so there's no need for speed at the microcontroller side. 
A basic 8 bit xxduino is fast enough. 

Now a more detailed description. Skip this if you don't want to overthink this thing.

Control method: hysteretic burst mode (STBY input, pin 5 of L6699).
Primary input for control (to uC): the heartbeat signal (lo gate drive, pin 11 of L6699), 50% average @ continuous operation, 0% @ shutdown.
Hysteretic feedback signal: OVP+ via optocoupler.
Output voltage is set in hardware (TVS diodes at the output), accuracy worse than 8%, ripple horrible (huh?) 

If you've read this bit, don't worry, it's just an intermediate stage, it's OK


----------



## Tony Bogs (Apr 12, 2014)

The description of the control mechanism in the previous post only applies to low power levels. And so does the ripple.
At high power output, the operating frequency set by the microcontroller and the value of the (constant power) load determine the value of the output voltage.

I ran a simulation of LLC startup and did some final checks.

Two last minute additions to the LLC controller:
1) a comparator circuit for the prevention of false triggering of the overcurrent protection during startup (voltage at the soft start CSS pin is below 0.9V). 
The circuit adds capacitance at the DELAY pin, thereby increasing the value for immediate overcurrent shutdown to 200% 
and delaying shutdown at values above 100% by about 10 msec,
2) a NTC circuit, connected to the DIS (latch-up disable) input of the L6699, detects overtemperature of the cooler on the lo side.

So now dust can safely build up on the coolers and on the fan.


----------



## Tony Bogs (Apr 12, 2014)

The schematics for the high voltage buck stage are ready for the design of the PCBs.

Triple current protection is of course over the top. So desaturation detection is out, NTC overtemperature detection is in. 

AUXILIARY HV ISOLATED POWER SUPPLY FOR SiC 

It is a low power LLC design. The selected Ferroxcube 16mm 3F3 toroid can operate at high frequencies, 
it has a high voltage epoxy insulation layer (2000V) and its size is both compact enough for placement on a daughter board
and large enough for the windings. Winding this transformer by hand is doable, only 17 turns max. 

The combination of R311, R312 and the zener shunt regulators (D307..309) lowers the power consumption at low load. 
When the zeners start carrying current, the AC resistance for the LLC DC/DC drops significantly, thereby reducing the quality factor and the (DC) gain of the LLC network. 
This method is preferred over burst mode because power consumption is low and burst mode can be audible.


----------



## Tony Bogs (Apr 12, 2014)

The math for the cooler of the LLC bridge diodes. It shows that it takes a lot of surface area and really hard blowing to keep the diodes cool enough at 120W loss.
It's a high loss value, but it also means that the LLC will have a wide 350 down to 175 V output voltage range. 

For a minute I thought that throwing desat out (buck stage) would mean that an overcurrent comparator had to be added. 
But luckily no, I'm running the LM2694 in current mode and the datasheet assumes voltage regulation, so the built-in overvoltage comparator acts as the overcurrent comparator in the buck stage. 
And it is at the right level.


----------



## Tony Bogs (Apr 12, 2014)

Another oops moment. It turns out that I do need an overcurrent comparator to replace desat.
Those SiC mosfets do have a limited SOA amp rating at high voltages. No more than 8A at 1050V and Tcase > 25 deg C for the one in the schematic.


----------



## Tony Bogs (Apr 12, 2014)

For those that have been following this thread, this is nothing new, but for others: I'm designing and builing a CC charger. 
Forget about CV charging, it takes a long time to squeeze the last 10 to 20% in and many, if not most or all, chemistries degrade more rapidly when fully charged. 

CC allows the use of current mode hysteretic control. The buck stage without an output filter has a peak to peak ripple of about 1 to 2.5 A. That is a bit too much.

The output filter has been modified somewhat. It reduces the ripple to less than 200mA, which is acceptable. 

I still have to do the final math and simulations, so parts values can change.

The air core inductor does not only filter but it also serves to limit the short circuit current to less than the surge value of the diodes that protect against the wrong polarity of voltages and currents. 
The varistor absorbs the stored energy in the inductors in case the connection to the battery gets lost.


----------



## Tony Bogs (Apr 12, 2014)

After running the simulation, checking the specs, doing the math this is the result.

Peak short circuit current < 70A at 900V out. Peak output voltage 1650V @100A (varistor spec). Well within the 150A surge current specs of the diodes.

Air core L: an online calculator gave 7 layers of AWG18 on a ETD49 coil former for 500uH.


----------



## Tony Bogs (Apr 12, 2014)

The buck output stage for the "basic" on-board, non-isolated, 3300W/6600W, nominal 230V~ in, 390V out charger. For low output voltages (down to 144V nominal) an extra STPSC1206 is needed.
At 500V DC max input, the snubber R105 has a loss of about 10W. The snubber cap C102 improves ZVS at turn-off with the aid of diode D111.


----------



## Tony Bogs (Apr 12, 2014)

Final checks, modifications, simplifications and tweaks before the design of the PCBs for the buck stage(s) starts.

The snubber diode D111 in the low volage Si version is a Vishay FESF16JT with an insulated tab for easier assembly.
The 1050V SiC version needs a 470R/1nF snubber. The snubber resistor power rating is 40W @ 100 deg C. 
Four low inductance Nikkohm TO-126 120R or equivalent in series will do. Snubber diodes: two SUF4007 in series.

The transformer in the isolated auxiliary hi side power supply for the gate driver and the rectifier circuit will be simplified. Trade-off: higher loss (few Watts).
It will be possible to use an off-the-shelf part (through hole, large) or the toroid version (less expensive, SMT, smaller). Only two simple windings remain with a 1:1 ratio.

The OCP comparator circuit for the buck stage has been modified. The threshold now increases as the input voltage decreases. 
To make implementation as easy as possible, the polarity of the current sensing had to be inverted. 

Last remark: the values of the main Fastron inductors have been based on a maximum 150V voltage between input and output (nominal values). 
In the "basic" non-isolated setup this voltage can be higher if the output voltage is low (down to 144V nominal). 
If this is the case, two Fastron inductors in series are needed. 

And now the versions of the buck stages have to be merged for "universal" PCB layouts.

P.S. The loss factors in the snubbers are a factor 10 lower.


----------



## Tony Bogs (Apr 12, 2014)

The parts of the buck stage are on the main board.


----------



## Tony Bogs (Apr 12, 2014)

The "universal" buck schematic is ready. There is progress on the PCB layout.
The field of the air core inductor is at a 90 degree angle to the PCB to reduce effects on other magnetic parts. Ferrite I segments of EQ cores can be used to "short circuit" the field. 

And now a LLC intermezzo. How about a small modification to the LLC for a 3kW HV in, 12V out DC/DC? It so happens that the core sizes of the LLC result in about 12V per turn.
Almost ideal for high amps 12V out. 
In commercial, high volume products disc shaped windings and synchronous rectification can be used, but in this DIY project a lot of litz and big schottky will have to do.
PM cores have the windings in the right direction for easier assembly of the bulky high amps parts like the IXYS DSS2X160-0045A dual schottky in SOT-227B minibloc.


----------



## Tony Bogs (Apr 12, 2014)

The control board for the buck stage is a litlle behind schedule and the cause is the weather. Heart of the summer temperatures in april. 

From the image it is clear that not all parts have been placed on the board, but they have been grouped. It seems that the size of the board has to be increased to accomodate all components. 

Now back to the 12V DC/DC LLC converter. I think I'll give a laminated busbar a try. 
Six sheets of 0,5mm copper with glass filled epoxy sheets of the same thickness between them. Together the sheets form a single secondary winding.
Probably a lot easier to screw onto a SOT227B diode minibloc terminal than a bundle of thin litz wires.


----------



## Tony Bogs (Apr 12, 2014)

The layout of the pcb for the buck (hv step down) control circuit is almost ready for the foundry!

A real milestone! Without a finished buck stage the LLC does not have a suitable load for a high voltage at its output. 
A current mode buck stage, connected to a battery, is a constant power load with a much higher AC resistance than the battery. The math is really simple.

At low output voltages, there's no LLC AC resistance issue. So I'm definitely going to make the necessary changes to the LLC main boad to support low output voltages at high amps. 
Main reason: supply high power for 12 to 48 V car systems and in particular the inexpensive off-the-shelf low V DC to 220/240V AC inverters.


----------



## Tony Bogs (Apr 12, 2014)

Five PCBs for the buck stage have been ordered. 
There are a few holydays coming so it will probably take about two weeks before they're in.

The main board is 7" x 8.5". But with that size it is capable of delivering *18 kW *
to a 900 V (max) battery (900V x 20A). But we'll have to see, there's the pudding and there's the eating.
SiC components for this: 1x WOLFSPEED C2M0025D0120D and two C4D050120D SiC diodes.


----------



## Tony Bogs (Apr 12, 2014)

I'm a bit puzzled by the high number of views of the very simple overcurrent circuit about 7 or 8 posts back.
71 views or something like that. What's so interesting?, I wonder. A simple comparator circuit and a bit of delay. 
OK, allright, the delay is a sort of a trick. Once triggered, the current can increase a little bit more. 
Background: the threshold is very close to the hardware limit of the sensor. The threshold should actually be set a little bit above the limit.


----------



## Tony Bogs (Apr 12, 2014)

The PCBs for the buck stage are in production. No issues were reported by the engineers at the foundry.

As always, the boards have been designed with modular use, low cost and a wide range of applications in mind:
- autonomous operation: ASIC control;
- each module has its own auxiliary low volt power supply on board;
- fully hard wired, only bit banging on a single, low speed, easy to program microcontroller (xxxduino or similar);
- minimal wiring of fault tolerant interfacing: single ground and 5V/3.3V power supply, on/off and fault signals combined with PWM set and feedback signals, high dV/dt rated optocouplers with shield;
- inexpensive connections: two sided 35 micron PCBs, generic 0.1" 3 and 5 pin connectors, and 6.3mm faston power cables and connectors;
- ready for 600 to 750V (900V max) battery packs;
- optional liquid cooling.


----------



## Tony Bogs (Apr 12, 2014)

If not delayed for some reason, there should be a 3kW non-isolated charger up and running mid may.

As always, I found some minor issues with the boards now in production. 
One is a footprint that doesn't match the part. Solution: buy a part that fits and does the same. 
Downside: it is more expensive. Ah, who cares? It's only €20 more expensive. 
The others: I forgot to modify the controllers feedback circuit for inverted current sensing.
Luckily, it is easy to solve without modifications to the PCB. 

Some other characteristics of the charger:
- it doesn't need a switch box to use 32A or 48 (50A), single phase as an input;
- integrated BMS: BMS parameters can be used for the charging profile (see below);
- CCCV is possible if you really, really want it.

*Charging profile for first gen Leaf cells (and Li-ion in general)*
Those are the ones I probably will be using, because there are a lot of them sold by now and they're cheap and powerful.

It is CCCV based, but is uses pulse charging to determine the internal impedance of the pack.

Here goes. START
Start at the highest current. 
The value is determined by the desired speed of charging and maximum output power / current rating of the charger and temperature of the cells.

Then, in a continuous loop (100+ ms step) derate the current by a small step when:

- the measured temperature of a single cell is higher than the safe value for the actual charging current, OR (inclusive)

- the voltage of a single cell exceeds 4V (chemistry dependent).

Stop criteria for the loop: the actual current is lower than 1A (or other set value) OR (inclusive) fault conditions.

Fault conditions include: low cell voltage and high internal impedance at pack level.
END

Temperature is extremely important, especially when applying the newer NMC chemistries.
NMC811 for instance has a very low thermal runaway point. Check out prof Jeff Dahn's (the Tesla battery expert) site at Dahlhouse university.


----------



## Tony Bogs (Apr 12, 2014)

I forgot to mention that the 3kW is the power limit of a single phase outlet where I live. 
With 3 phase when the LLC boards are ready, a single 230/240V high amp outlet and even better battery input the power goes up to 18kW.


----------



## Tony Bogs (Apr 12, 2014)

The controller board for the buck stage is ready.


----------



## Tony Bogs (Apr 12, 2014)

Man, normally is very wet here. Terribly boggy with a lot of peat. But now, the worst drought in years. 

Almost hotter than one would imagine when thinking of the demon quarters. 

The weather guys and girls say it's the climate change, so there is urgency, 

but with these temperatures I'm not going to spend a lot of time sweating behind soldering irons, monitors and high kW loads. 



I'll be back with real news but not before november, I guess.


----------



## Tony Bogs (Apr 12, 2014)

OK, next time PCBA service. No, this project is not dead.

*800V Taycan*
800V has arrived. Porsche has taken the fast lane with the Taycan. But still a dot in the rear view mirror of Tesla of course.
Very green presentation yesterday with views to hydro, wind and solar power.
That's the way forward. 1200V in 2030? Wouldn't surprise me. 

*SOLID STATE*
The first intrinsicly safe solid state battery pack is there. In production. By Prologium from Taiwan.
Chinese car maker NIO is one of the first with NMC811 (ES6?). 
It now wants to test the CES 2019 innovation award winning Prologium solid state pack in a car. 

And car makers in Europe are also testing the Prologium pack. 

It is easy to find, just search for NIO Prologium CES 2019 innovation.

*VIPER 1050V*

ST also delivered: a new 1050V member of the Viper family.
Just what is needed for the auxiliary power circuits in this 800V modular charger design.
One hurdle taken, moving on as soon as I have the spare time.


----------



## Tony Bogs (Apr 12, 2014)

Finally. The scientific basis has been presented.
Research done at UCR supports the validity of the pulse charging method.
It is used to determine the internal impedance and adjust charging amps accordingly to prevent premature failure and reduce degradation.

https://www.greencarcongress.com/2020/03/20200313-ucr.html


----------



## john61ct (Feb 25, 2017)

https://m.techxplore.com/news/2020-03-fast-charging-electric-car-batteries.html


----------



## kennybobby (Aug 10, 2012)

*Re: science?*

"Bizarrely amateurish piece of research that shows absolutely nothing new. Bad press for a journal named "Energy Storage." 

See more notes from a review of this "science" at

https://www.mynissanleaf.com/viewtopic.php?f=9&t=31010&p=580890#p580888


----------



## Tony Bogs (Apr 12, 2014)

No worries, kennybobby, Tesla will soon be presenting a better battery chemistry for fast charging. Longer lifespan. 

SVOLT already has sort of ruined the party for Elon by being the first with million mile cobalt free chemistry.


----------



## Tony Bogs (Apr 12, 2014)

There's a new IC for the PFC interleave delay line. Finally the very ancient 4000 series shift register can be replaced.
The microchip HV57908 series tor parallel, 8MHz, 8 to 80V driver. Cost is about the same in total. 


http://ww1.microchip.com/downloads/en/DeviceDoc/20005877A.pdf


There's a 6.6 kW single transformer LLC coming.
Onsemi reference design for a 6.6 kW charger: https://www.onsemi.com/pub/Collateral/TND6320-D.PDF
Yep, this project is alive, but progress is terribly slow.


----------



## Tony Bogs (Apr 12, 2014)

The first LLC board has been fitted with a transformer for low to high V application: 5 turns primary side, 50 secondary.
It now runs with an Onsemi controller and Si FETS. A dual microcontroller CANBUS design is ready.
My projects are for my personal use and for evaluation. Most important conclusion so far: Early Cree SiC mosfets presented issues with hard switching in the PFC. Newer cascode SiC JFET are more suitable.
The cascode SiC JFET devices are also suitable for motor inverter designs.


----------

